Message ID | 20240131-ufs-phy-clock-v3-17-58a49d2f4605@linaro.org (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | Fix Qcom UFS PHY clocks | expand |
On 31.01.2024 08:07, Manivannan Sadhasivam wrote: > QMP PHY used in SM8650 requires 3 clocks: > > * ref - 19.2MHz reference clock from RPMh > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from TCSR > > Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 942e602bfc97..464b871ebcb7 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2476,10 +2476,12 @@ ufs_mem_phy: phy@1d80000 { compatible = "qcom,sm8650-qmp-ufs-phy"; reg = <0 0x01d80000 0 0x2000>; - clocks = <&tcsr TCSR_UFS_CLKREF_EN>, - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, + <&tcsr TCSR_UFS_CLKREF_EN>; clock-names = "ref", - "ref_aux"; + "ref_aux", + "qref"; resets = <&ufs_mem_hc 0>; reset-names = "ufsphy";
QMP PHY used in SM8650 requires 3 clocks: * ref - 19.2MHz reference clock from RPMh * ref_aux - Auxiliary reference clock from GCC * qref - QREF clock from TCSR Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)