@@ -5,6 +5,7 @@
#include <dt-bindings/clock/amlogic,a1-pll-clkc.h>
#include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>
+#include <dt-bindings/clock/amlogic,a1-audio-clkc.h>
#include <dt-bindings/gpio/meson-a1-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
@@ -435,6 +436,53 @@ sd_emmc: sd@10000 {
power-domains = <&pwrc PWRC_SD_EMMC_ID>;
status = "disabled";
};
+
+ audio: bus@50000 {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0x50000 0 0x4980>;
+ power-domains = <&pwrc PWRC_AUDIO_ID>;
+
+ clkc_audio: audio-clock-controller@0 {
+ compatible = "amlogic,a1-audio-clkc";
+ reg = <0x0 0x0 0x0 0xb0>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ clocks = <&clkc_audio2 AUD2_CLKID_AUDIOTOP>,
+ <&clkc_periphs CLKID_AUDIO>,
+ <&clkc_periphs CLKID_DDS_IN>,
+ <&clkc_pll CLKID_FCLK_DIV2>,
+ <&clkc_pll CLKID_FCLK_DIV3>,
+ <&clkc_pll CLKID_HIFI_PLL>,
+ <&xtal>;
+ clock-names = "core",
+ "pclk",
+ "dds_in",
+ "fclk_div2",
+ "fclk_div3",
+ "hifi_pll",
+ "xtal";
+ };
+
+ clkc_audio2: audio-clock-controller@4800 {
+ compatible = "amlogic,a1-audio2-clkc";
+ reg = <0x0 0x4800 0x0 0x20>;
+ #clock-cells = <1>;
+ clocks = <&clkc_periphs CLKID_AUDIO>,
+ <&clkc_periphs CLKID_DDS_IN>,
+ <&clkc_pll CLKID_FCLK_DIV2>,
+ <&clkc_pll CLKID_FCLK_DIV3>,
+ <&clkc_pll CLKID_HIFI_PLL>,
+ <&xtal>;
+ clock-names = "pclk",
+ "dds_in",
+ "fclk_div2",
+ "fclk_div3",
+ "hifi_pll",
+ "xtal";
+ };
+ };
};
usb: usb@fe004400 {
Add the bus and audio clock controllers' device tree nodes. Signed-off-by: Jan Dakinevich <jan.dakinevich@salutedevices.com> --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 48 +++++++++++++++++++++++ 1 file changed, 48 insertions(+)