Message ID | 20240624-topic-sm8650-upstream-fix-dispcc-v2-3-ddaa13f3b207@linaro.org (mailing list archive) |
---|---|
State | Awaiting Upstream, archived |
Headers | show |
Series | clk: qcom: dispcc-sm8650: round of fixes | expand |
On Mon, Jun 24, 2024 at 10:05:52AM GMT, Neil Armstrong wrote: > Update the GDSC flags by adding missing POLL_CFG_GDSCR flag. > > Fixes: 9e939f008338 ("clk: qcom: add the SM8650 Display Clock Controller driver") > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- > drivers/clk/qcom/dispcc-sm8650.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff --git a/drivers/clk/qcom/dispcc-sm8650.c b/drivers/clk/qcom/dispcc-sm8650.c index 1222a26c45c8..85d8809e31e7 100644 --- a/drivers/clk/qcom/dispcc-sm8650.c +++ b/drivers/clk/qcom/dispcc-sm8650.c @@ -1610,7 +1610,7 @@ static struct gdsc mdss_gdsc = { .name = "mdss_gdsc", }, .pwrsts = PWRSTS_OFF_ON, - .flags = HW_CTRL | RETAIN_FF_ENABLE, + .flags = POLL_CFG_GDSCR | HW_CTRL | RETAIN_FF_ENABLE, }; static struct gdsc mdss_int2_gdsc = { @@ -1619,7 +1619,7 @@ static struct gdsc mdss_int2_gdsc = { .name = "mdss_int2_gdsc", }, .pwrsts = PWRSTS_OFF_ON, - .flags = HW_CTRL | RETAIN_FF_ENABLE, + .flags = POLL_CFG_GDSCR | HW_CTRL | RETAIN_FF_ENABLE, }; static struct clk_regmap *disp_cc_sm8650_clocks[] = {