| Message ID | 20240628105542.5456-2-ansuelsmth@gmail.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | [v2,1/2] arm64: dts: mediatek: mt7622: readd syscon to pciesys node | expand |
On 28/06/2024 12:55, Christian Marangi wrote: > Add required syscon compatible for mt7622 pciesys. This is required for > SATA interface as the regs are shared. > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> > --- > Changes v2: > - Fix broken schema example Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
Quoting Christian Marangi (2024-06-28 03:55:41) > Add required syscon compatible for mt7622 pciesys. This is required for > SATA interface as the regs are shared. > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> > --- Applied to clk-next
diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml index c77111d10f90..9c3913f9092c 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml @@ -14,9 +14,11 @@ maintainers: properties: compatible: - enum: - - mediatek,mt7622-pciesys - - mediatek,mt7629-pciesys + oneOf: + - items: + - const: mediatek,mt7622-pciesys + - const: syscon + - const: mediatek,mt7629-pciesys reg: maxItems: 1 @@ -38,7 +40,7 @@ additionalProperties: false examples: - | clock-controller@1a100800 { - compatible = "mediatek,mt7622-pciesys"; + compatible = "mediatek,mt7622-pciesys", "syscon"; reg = <0x1a100800 0x1000>; #clock-cells = <1>; #reset-cells = <1>;
Add required syscon compatible for mt7622 pciesys. This is required for SATA interface as the regs are shared. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> --- Changes v2: - Fix broken schema example .../bindings/clock/mediatek,mt7622-pciesys.yaml | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-)