| Message ID | 20240801-x1e80100-clk-gcc-fix-usb-phy-gdscs-pwrsts-v1-1-8df016768a0f@linaro.org (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | clk: qcom: gcc-x1e80100: Fix USB 0 and 1 PHY GDSC pwrsts flags | expand |
On Thu, 01 Aug 2024 13:21:07 +0300, Abel Vesa wrote: > Allowing these GDSCs to collapse makes the QMP combo PHYs lose their > configuration on machine suspend. Currently, the QMP combo PHY driver > doesn't reinitialise the HW on resume. Under such conditions, the USB > SuperSpeed support is broken. To avoid this, mark the pwrsts flags with > RET_ON. This is in line with USB 2 PHY GDSC config. > > > [...] Applied, thanks! [1/1] clk: qcom: gcc-x1e80100: Fix USB 0 and 1 PHY GDSC pwrsts flags commit: f4c16a7cdbd2edecdb854f2ce0ef07c6263c5379 Best regards,
On Thu, 01 Aug 2024 13:21:07 +0300, Abel Vesa wrote: > Allowing these GDSCs to collapse makes the QMP combo PHYs lose their > configuration on machine suspend. Currently, the QMP combo PHY driver > doesn't reinitialise the HW on resume. Under such conditions, the USB > SuperSpeed support is broken. To avoid this, mark the pwrsts flags with > RET_ON. This is in line with USB 2 PHY GDSC config. > > > [...] Applied, thanks! [1/1] clk: qcom: gcc-x1e80100: Fix USB 0 and 1 PHY GDSC pwrsts flags commit: f4c16a7cdbd2edecdb854f2ce0ef07c6263c5379 Best regards,
diff --git a/drivers/clk/qcom/gcc-x1e80100.c b/drivers/clk/qcom/gcc-x1e80100.c index 6ffb3ddcae08..80e90e31be33 100644 --- a/drivers/clk/qcom/gcc-x1e80100.c +++ b/drivers/clk/qcom/gcc-x1e80100.c @@ -6203,7 +6203,7 @@ static struct gdsc gcc_usb_0_phy_gdsc = { .pd = { .name = "gcc_usb_0_phy_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, }; @@ -6215,7 +6215,7 @@ static struct gdsc gcc_usb_1_phy_gdsc = { .pd = { .name = "gcc_usb_1_phy_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, };
Allowing these GDSCs to collapse makes the QMP combo PHYs lose their configuration on machine suspend. Currently, the QMP combo PHY driver doesn't reinitialise the HW on resume. Under such conditions, the USB SuperSpeed support is broken. To avoid this, mark the pwrsts flags with RET_ON. This is in line with USB 2 PHY GDSC config. Fixes: 161b7c401f4b ("clk: qcom: Add Global Clock controller (GCC) driver for X1E80100") Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- drivers/clk/qcom/gcc-x1e80100.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- base-commit: e92057c615fec749fefcca4ab28ee5c425e3691b change-id: 20240801-x1e80100-clk-gcc-fix-usb-phy-gdscs-pwrsts-6fa0eb78164f Best regards,