Message ID | 20241021-x1e80100-clk-gcc-fix-usb-mp-phy-gdsc-pwrsts-flags-v2-1-0bfd64556238@linaro.org (mailing list archive) |
---|---|
State | Awaiting Upstream, archived |
Headers | show |
Series | [v2] clk: qcom: gcc-x1e80100: Fix USB MP SS1 PHY GDSC pwrsts flags | expand |
On Mon, 21 Oct 2024 15:46:25 +0300, Abel Vesa wrote: > Allowing these GDSCs to collapse makes the QMP combo PHYs lose their > configuration on machine suspend. Currently, the QMP combo PHY driver > doesn't reinitialise the HW on resume. Under such conditions, the USB > SuperSpeed support is broken. To avoid this, mark the pwrsts flags with > RET_ON. This has been already done for USB 0 and 1 SS PHY GDSCs, > Do this also for the USB MP SS1 PHY GDSC config. The USB MP SS0 PHY GDSC > already has it. > > [...] Applied, thanks! [1/1] clk: qcom: gcc-x1e80100: Fix USB MP SS1 PHY GDSC pwrsts flags commit: e7f37a7d16310d3c9474825de26a67f00983ebea Best regards,
diff --git a/drivers/clk/qcom/gcc-x1e80100.c b/drivers/clk/qcom/gcc-x1e80100.c index 0f578771071fadb0ea7f610f04c5510a85a8485a..33afad9c878d30f487f63b311bcea6296d0653fd 100644 --- a/drivers/clk/qcom/gcc-x1e80100.c +++ b/drivers/clk/qcom/gcc-x1e80100.c @@ -6155,7 +6155,7 @@ static struct gdsc gcc_usb3_mp_ss1_phy_gdsc = { .pd = { .name = "gcc_usb3_mp_ss1_phy_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, };