| Message ID | 20241122-switch_gdsc_mode-v1-1-365f097ecbb0@quicinc.com (mailing list archive) |
|---|---|
| State | Under Review |
| Headers | show |
| Series | Use APIs in gdsc genpd to switch gdsc mode for venus v4 core | expand |
On Fri, Nov 22, 2024 at 04:01:45PM +0530, Renjiang Han wrote: > From: Taniya Das <quic_tdas@quicinc.com> > > The video driver will be using the newly introduced 'will be' or 'is using'? Or will be using it for these platforms? Is there any kind of dependency between two patches in the series? > dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW > control modes at runtime. > Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for > Qualcomm SoC SC7180 and SDM845. Is it applicable to any other platforms? Why did you select just these two? > > Signed-off-by: Taniya Das <quic_tdas@quicinc.com> > Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com> > --- > drivers/clk/qcom/videocc-sc7180.c | 2 +- > drivers/clk/qcom/videocc-sdm845.c | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c > index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644 > --- a/drivers/clk/qcom/videocc-sc7180.c > +++ b/drivers/clk/qcom/videocc-sc7180.c > @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = { > .pd = { > .name = "vcodec0_gdsc", > }, > - .flags = HW_CTRL, > + .flags = HW_CTRL_TRIGGER, > .pwrsts = PWRSTS_OFF_ON, > }; > > diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c > index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644 > --- a/drivers/clk/qcom/videocc-sdm845.c > +++ b/drivers/clk/qcom/videocc-sdm845.c > @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = { > }, > .cxcs = (unsigned int []){ 0x890, 0x930 }, > .cxc_count = 2, > - .flags = HW_CTRL | POLL_CFG_GDSCR, > + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, > .pwrsts = PWRSTS_OFF_ON, > }; > > @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = { > }, > .cxcs = (unsigned int []){ 0x8d0, 0x950 }, > .cxc_count = 2, > - .flags = HW_CTRL | POLL_CFG_GDSCR, > + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, > .pwrsts = PWRSTS_OFF_ON, > }; > > > -- > 2.34.1 >
On 11/22/2024 4:29 PM, Dmitry Baryshkov wrote: > On Fri, Nov 22, 2024 at 04:01:45PM +0530, Renjiang Han wrote: >> From: Taniya Das <quic_tdas@quicinc.com> >> >> The video driver will be using the newly introduced > > 'will be' or 'is using'? Or will be using it for these platforms? Is > there any kind of dependency between two patches in the series? > The video driver will not be able to work without the clock side changes. >> dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW >> control modes at runtime. >> Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for >> Qualcomm SoC SC7180 and SDM845. > > Is it applicable to any other platforms? Why did you select just these > two? > The V6 version of Video driver is already using them, now the video driver wants to migrate to v4 version of the HW to use the new flag. >> >> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> >> Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com> >> --- >> drivers/clk/qcom/videocc-sc7180.c | 2 +- >> drivers/clk/qcom/videocc-sdm845.c | 4 ++-- >> 2 files changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c >> index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644 >> --- a/drivers/clk/qcom/videocc-sc7180.c >> +++ b/drivers/clk/qcom/videocc-sc7180.c >> @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = { >> .pd = { >> .name = "vcodec0_gdsc", >> }, >> - .flags = HW_CTRL, >> + .flags = HW_CTRL_TRIGGER, >> .pwrsts = PWRSTS_OFF_ON, >> }; >> >> diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c >> index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644 >> --- a/drivers/clk/qcom/videocc-sdm845.c >> +++ b/drivers/clk/qcom/videocc-sdm845.c >> @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = { >> }, >> .cxcs = (unsigned int []){ 0x890, 0x930 }, >> .cxc_count = 2, >> - .flags = HW_CTRL | POLL_CFG_GDSCR, >> + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, >> .pwrsts = PWRSTS_OFF_ON, >> }; >> >> @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = { >> }, >> .cxcs = (unsigned int []){ 0x8d0, 0x950 }, >> .cxc_count = 2, >> - .flags = HW_CTRL | POLL_CFG_GDSCR, >> + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, >> .pwrsts = PWRSTS_OFF_ON, >> }; >> >> >> -- >> 2.34.1 >> >
On Fri, Nov 22, 2024 at 10:25:44PM +0530, Taniya Das wrote: > > > On 11/22/2024 4:29 PM, Dmitry Baryshkov wrote: > > On Fri, Nov 22, 2024 at 04:01:45PM +0530, Renjiang Han wrote: > > > From: Taniya Das <quic_tdas@quicinc.com> > > > > > > The video driver will be using the newly introduced > > > > 'will be' or 'is using'? Or will be using it for these platforms? Is > > there any kind of dependency between two patches in the series? > > > The video driver will not be able to work without the clock side changes. Will enabling this flag break the video driver until it is updated? > > > > dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW > > > control modes at runtime. > > > Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for > > > Qualcomm SoC SC7180 and SDM845. > > > > Is it applicable to any other platforms? Why did you select just these > > two? > > > > The V6 version of Video driver is already using them, now the video driver > wants to migrate to v4 version of the HW to use the new flag. I mean slightly different issue. We have following drivers: videocc-sa8775p.c - already uses HW_CTRL_TRIGGER videocc-sc7180.c - being converted now videocc-sc7280.c - already uses HW_CTRL_TRIGGER videocc-sdm845.c - being converted now videocc-sm7150.c videocc-sm8150.c videocc-sm8250.c - already uses HW_CTRL_TRIGGER videocc-sm8350.c - already uses HW_CTRL_TRIGGER videocc-sm8450.c videocc-sm8550.c - already uses HW_CTRL_TRIGGER This leaves sm7150, sm8150 and sm8450 untouched. Don't they also need to use HW_CTRL_TRIGGER? > > > > > > > Signed-off-by: Taniya Das <quic_tdas@quicinc.com> > > > Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com> > > > --- > > > drivers/clk/qcom/videocc-sc7180.c | 2 +- > > > drivers/clk/qcom/videocc-sdm845.c | 4 ++-- > > > 2 files changed, 3 insertions(+), 3 deletions(-) > > > > > > diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c > > > index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644 > > > --- a/drivers/clk/qcom/videocc-sc7180.c > > > +++ b/drivers/clk/qcom/videocc-sc7180.c > > > @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = { > > > .pd = { > > > .name = "vcodec0_gdsc", > > > }, > > > - .flags = HW_CTRL, > > > + .flags = HW_CTRL_TRIGGER, > > > .pwrsts = PWRSTS_OFF_ON, > > > }; > > > diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c > > > index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644 > > > --- a/drivers/clk/qcom/videocc-sdm845.c > > > +++ b/drivers/clk/qcom/videocc-sdm845.c > > > @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = { > > > }, > > > .cxcs = (unsigned int []){ 0x890, 0x930 }, > > > .cxc_count = 2, > > > - .flags = HW_CTRL | POLL_CFG_GDSCR, > > > + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, > > > .pwrsts = PWRSTS_OFF_ON, > > > }; > > > @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = { > > > }, > > > .cxcs = (unsigned int []){ 0x8d0, 0x950 }, > > > .cxc_count = 2, > > > - .flags = HW_CTRL | POLL_CFG_GDSCR, > > > + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, > > > .pwrsts = PWRSTS_OFF_ON, > > > }; > > > > > > -- > > > 2.34.1 > > > > > > > -- > Thanks & Regards, > Taniya Das.
On 23/11/2024 00:05, Dmitry Baryshkov wrote: > This leaves sm7150, sm8150 and sm8450 untouched. Don't they also need to > use HW_CTRL_TRIGGER? I believe the correct list here is anything that is HFI_VERSION_4XX in You can't apply the second patch in this series without ensuring the clock controllers for sdm845 and sm7180 grep HFI_VERSION_4XX drivers/media/platform/qcom/venus/core.c drivers/clk/qcom/videocc-sdm845.c drivers/clk/qcom/videocc-sc7180.c Hmm.. that's what this patch does, to be fair my other email was flippant. This is fine in general, once we can get some Tested-by: for it. That's my question - what platforms has this change been tested on ? I can do sdm845 but, we'll need to find someone with 7180 to verify IMO. --- bod
diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644 --- a/drivers/clk/qcom/videocc-sc7180.c +++ b/drivers/clk/qcom/videocc-sc7180.c @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = { .pd = { .name = "vcodec0_gdsc", }, - .flags = HW_CTRL, + .flags = HW_CTRL_TRIGGER, .pwrsts = PWRSTS_OFF_ON, }; diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644 --- a/drivers/clk/qcom/videocc-sdm845.c +++ b/drivers/clk/qcom/videocc-sdm845.c @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = { }, .cxcs = (unsigned int []){ 0x890, 0x930 }, .cxc_count = 2, - .flags = HW_CTRL | POLL_CFG_GDSCR, + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, .pwrsts = PWRSTS_OFF_ON, }; @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = { }, .cxcs = (unsigned int []){ 0x8d0, 0x950 }, .cxc_count = 2, - .flags = HW_CTRL | POLL_CFG_GDSCR, + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, .pwrsts = PWRSTS_OFF_ON, };