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Fri, 22 Nov 2024 10:32:06 GMT Received: from hu-renjiang-sha.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 22 Nov 2024 02:32:03 -0800 From: Renjiang Han Date: Fri, 22 Nov 2024 16:01:45 +0530 Subject: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20241122-switch_gdsc_mode-v1-1-365f097ecbb0@quicinc.com> References: <20241122-switch_gdsc_mode-v1-0-365f097ecbb0@quicinc.com> In-Reply-To: <20241122-switch_gdsc_mode-v1-0-365f097ecbb0@quicinc.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Mauro Carvalho Chehab CC: , , , , Renjiang Han , Taniya Das X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1732271519; l=1735; i=quic_renjiang@quicinc.com; s=20241001; h=from:subject:message-id; bh=MUqdC0nCpqkpwebFi/J2nt4uPGkXTGdVM5FuF2amm+Q=; b=DXbGUeJgRFf0IplYk7DUm+awJlb/lJpwXJidZdhQi5YW0N3N4xsyA48q//1PSfbEdbqM+VtzQ 1YgDoQdsWiBC9XI4sTl5EmbKYTUJoziTJVtnvpcOsDoSdHeFPVoWyOH X-Developer-Key: i=quic_renjiang@quicinc.com; a=ed25519; pk=8N59kMJUiVH++5QxJzTyHB/wh/kG5LxQ44j9zhUvZmw= X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: d7b7PubojC-8WRN94wHFo5PAKvkQqOVR X-Proofpoint-ORIG-GUID: d7b7PubojC-8WRN94wHFo5PAKvkQqOVR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 adultscore=0 suspectscore=0 spamscore=0 malwarescore=0 mlxscore=0 mlxlogscore=723 phishscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411220089 From: Taniya Das The video driver will be using the newly introduced dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW control modes at runtime. Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for Qualcomm SoC SC7180 and SDM845. Signed-off-by: Taniya Das Signed-off-by: Renjiang Han --- drivers/clk/qcom/videocc-sc7180.c | 2 +- drivers/clk/qcom/videocc-sdm845.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644 --- a/drivers/clk/qcom/videocc-sc7180.c +++ b/drivers/clk/qcom/videocc-sc7180.c @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = { .pd = { .name = "vcodec0_gdsc", }, - .flags = HW_CTRL, + .flags = HW_CTRL_TRIGGER, .pwrsts = PWRSTS_OFF_ON, }; diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644 --- a/drivers/clk/qcom/videocc-sdm845.c +++ b/drivers/clk/qcom/videocc-sdm845.c @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = { }, .cxcs = (unsigned int []){ 0x890, 0x930 }, .cxc_count = 2, - .flags = HW_CTRL | POLL_CFG_GDSCR, + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, .pwrsts = PWRSTS_OFF_ON, }; @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = { }, .cxcs = (unsigned int []){ 0x8d0, 0x950 }, .cxc_count = 2, - .flags = HW_CTRL | POLL_CFG_GDSCR, + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, .pwrsts = PWRSTS_OFF_ON, };