Message ID | 831e85ebdfdaba3c7b05ac8407a1584c20ba4a86.1524044917.git.sean.wang@mediatek.com (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers | show |
On Wed, Apr 18, 2018 at 06:24:53PM +0800, sean.wang@mediatek.com wrote: > From: Sean Wang <sean.wang@mediatek.com> > > The MediaTek MT7623 SoC contains a Mali-450, so add a compatible for it > and define its own vendor-specific properties. > > Signed-off-by: Sean Wang <sean.wang@mediatek.com> > --- > Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 9 +++++++++ > 1 file changed, 9 insertions(+) Reviewed-by: Rob Herring <robh@kernel.org> -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt index c1f65d1..e149995 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt @@ -20,6 +20,7 @@ Required properties: + rockchip,rk3228-mali + rockchip,rk3328-mali + stericsson,db8500-mali + + mediatek,mt7623-mali - reg: Physical base address and length of the GPU registers @@ -86,6 +87,14 @@ to specify one more vendor-specific compatible, among: * interrupt-names and interrupts: + combined: combined interrupt of all of the above lines + - mediatek,mt7623-mali + Required properties: + * resets: phandle to the reset line for the GPU + * mediatek,larb: phandle pointed to the local arbiter used to control the + access to external memory on the SoC. + see Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + for details + Example: mali: gpu@1c40000 {