From patchwork Fri May 19 15:58:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 9737569 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 863306020B for ; Fri, 19 May 2017 15:59:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 830AC2880A for ; Fri, 19 May 2017 15:59:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7795F2889E; Fri, 19 May 2017 15:59:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0677C2880A for ; Fri, 19 May 2017 15:59:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756192AbdESP7F (ORCPT ); Fri, 19 May 2017 11:59:05 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:55128 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755512AbdESP6K (ORCPT ); Fri, 19 May 2017 11:58:10 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 3843520C7C; Fri, 19 May 2017 17:58:08 +0200 (CEST) Received: from localhost (83.146.29.93.rev.sfr.net [93.29.146.83]) by mail.free-electrons.com (Postfix) with ESMTPSA id 0A512207F9; Fri, 19 May 2017 17:58:08 +0200 (CEST) From: Gregory CLEMENT To: Stephen Boyd , Mike Turquette , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory CLEMENT , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org, Nadav Haklai , Kostya Porotchkin , Neta Zur Hershkovits , Marcin Wojtas , Omri Itach , Shadi Ammouri Subject: [PATCH 2/5] clk: mvebu: ap806: do not depend anymore of the *-clock-output-names Date: Fri, 19 May 2017 17:58:02 +0200 Message-Id: <83d2035a1d00773c8e4c4d09134c81b0cd24152c.1495209464.git-series.gregory.clement@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As it was done for the cp110, this patch modifies the way the clock names are created. The name of each clock is now created by using its physical address as a prefix (as it was done for the platform device names). Thanks to this we have an automatic way to compute a unique name. Reviewed-by: Thomas Petazzoni Signed-off-by: Gregory CLEMENT Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt | 4 ---- drivers/clk/mvebu/ap806-system-controller.c | 46 ++++++++++++++++++++++++---------------------- 2 files changed, 24 insertions(+), 26 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt index 8968371d84e2..3faab71dff9f 100644 --- a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt @@ -21,15 +21,11 @@ Required properties: "marvell,ap806-system-controller", "syscon" - reg: register area of the AP806 system controller - #clock-cells: must be set to 1 - - clock-output-names: must be defined to: - "ap-cpu-cluster-0", "ap-cpu-cluster-1", "ap-fixed", "ap-mss" Example: syscon: system-controller@6f4000 { compatible = "marvell,ap806-system-controller", "syscon"; #clock-cells = <1>; - clock-output-names = "ap-cpu-cluster-0", "ap-cpu-cluster-1", - "ap-fixed", "ap-mss"; reg = <0x6f4000 0x1000>; }; diff --git a/drivers/clk/mvebu/ap806-system-controller.c b/drivers/clk/mvebu/ap806-system-controller.c index b2666b5c944f..95ae16e203ea 100644 --- a/drivers/clk/mvebu/ap806-system-controller.c +++ b/drivers/clk/mvebu/ap806-system-controller.c @@ -32,6 +32,18 @@ static struct clk_onecell_data ap806_clk_data = { .clk_num = AP806_CLK_NUM, }; +static char *ap806_unique_name(struct device *dev, struct device_node *np, + char *name) +{ + const __be32 *reg; + u64 addr; + + reg = of_get_property(np, "reg", NULL); + addr = of_translate_address(np, reg); + return devm_kasprintf(dev, GFP_KERNEL, "%llx-%s", + (unsigned long long)addr, name); +} + static int ap806_syscon_clk_probe(struct platform_device *pdev) { unsigned int freq_mode, cpuclk_freq; @@ -98,8 +110,7 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev) cpuclk_freq *= 1000 * 1000; /* CPU clocks depend on the Sample At Reset configuration */ - of_property_read_string_index(np, "clock-output-names", - 0, &name); + name = ap806_unique_name(dev, np, "cpu-cluster-0"); ap806_clks[0] = clk_register_fixed_rate(dev, name, NULL, 0, cpuclk_freq); if (IS_ERR(ap806_clks[0])) { @@ -107,8 +118,7 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev) goto fail0; } - of_property_read_string_index(np, "clock-output-names", - 1, &name); + name = ap806_unique_name(dev, np, "cpu-cluster-1"); ap806_clks[1] = clk_register_fixed_rate(dev, name, NULL, 0, cpuclk_freq); if (IS_ERR(ap806_clks[1])) { @@ -117,8 +127,7 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev) } /* Fixed clock is always 1200 Mhz */ - of_property_read_string_index(np, "clock-output-names", - 2, &fixedclk_name); + fixedclk_name = ap806_unique_name(dev, np, "fixed"); ap806_clks[2] = clk_register_fixed_rate(dev, fixedclk_name, NULL, 0, 1200 * 1000 * 1000); if (IS_ERR(ap806_clks[2])) { @@ -127,8 +136,7 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev) } /* MSS Clock is fixed clock divided by 6 */ - of_property_read_string_index(np, "clock-output-names", - 3, &name); + name = ap806_unique_name(dev, np, "mss"); ap806_clks[3] = clk_register_fixed_factor(NULL, name, fixedclk_name, 0, 1, 6); if (IS_ERR(ap806_clks[3])) { @@ -136,20 +144,14 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev) goto fail3; } - /* eMMC Clock is fixed clock divided by 3 */ - if (of_property_read_string_index(np, "clock-output-names", - 4, &name)) { - ap806_clk_data.clk_num--; - dev_warn(&pdev->dev, - "eMMC clock missing: update the device tree!\n"); - } else { - ap806_clks[4] = clk_register_fixed_factor(NULL, name, - fixedclk_name, - 0, 1, 3); - if (IS_ERR(ap806_clks[4])) { - ret = PTR_ERR(ap806_clks[4]); - goto fail4; - } + /* SDIO(/eMMC) Clock is fixed clock divided by 3 */ + name = ap806_unique_name(dev, np, "sdio"); + ap806_clks[4] = clk_register_fixed_factor(NULL, name, + fixedclk_name, + 0, 1, 3); + if (IS_ERR(ap806_clks[4])) { + ret = PTR_ERR(ap806_clks[4]); + goto fail4; } of_clk_add_provider(np, of_clk_src_onecell_get, &ap806_clk_data);