From patchwork Tue Jun 28 17:22:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Francois Moine X-Patchwork-Id: 9203815 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8900F60757 for ; Tue, 28 Jun 2016 18:42:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DE1A2860E for ; Tue, 28 Jun 2016 18:42:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 72A4728612; Tue, 28 Jun 2016 18:42:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0D4CA2860E for ; Tue, 28 Jun 2016 18:42:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752391AbcF1SmF (ORCPT ); Tue, 28 Jun 2016 14:42:05 -0400 Received: from smtp5-g21.free.fr ([212.27.42.5]:41578 "EHLO smtp5-g21.free.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752362AbcF1SmC (ORCPT ); Tue, 28 Jun 2016 14:42:02 -0400 Received: from localhost (unknown [82.245.201.222]) by smtp5-g21.free.fr (Postfix) with ESMTP id 5EBAE5FF27; Tue, 28 Jun 2016 20:46:42 +0200 (CEST) X-Mailbox-Line: From 96c1b4e0bb74e3c8a543975f0beb6f057d034323 Mon Sep 17 00:00:00 2001 Message-Id: <96c1b4e0bb74e3c8a543975f0beb6f057d034323.1467135898.git.moinejf@free.fr> In-Reply-To: References: From: Jean-Francois Moine Date: Tue, 28 Jun 2016 19:22:50 +0200 Subject: [PATCH 3/3] dt: sun8i: Define the clocks of the A83T To: Emilio Lopez , Maxime Ripard , Chen-Yu Tsai Cc: Stephen Boyd , Michael Turquette , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Change the clock definition using the CCU. Signed-off-by: Jean-Francois Moine --- Documentation/devicetree/bindings/clock/sunxi.txt | 7 ++++--- arch/arm/boot/dts/sun8i-a83t.dtsi | 16 ++++++++++++---- 2 files changed, 16 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt index 8f7619d..8e1f832 100644 --- a/Documentation/devicetree/bindings/clock/sunxi.txt +++ b/Documentation/devicetree/bindings/clock/sunxi.txt @@ -61,7 +61,6 @@ Required properties: "allwinner,sun9i-a80-apb1-gates-clk" - for the APB1 gates on A80 "allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31 "allwinner,sun8i-a23-apb2-gates-clk" - for the APB2 gates on A23 - "allwinner,sun8i-a83t-bus-gates-clk" - for the bus gates on A83T "allwinner,sun8i-h3-bus-gates-clk" - for the bus gates on H3 "allwinner,sun9i-a80-apbs-gates-clk" - for the APBS gates on A80 "allwinner,sun4i-a10-display-clk" - for the display clocks on the A10 @@ -87,6 +86,7 @@ Required properties: "allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80 "allwinner,sun4i-a10-ve-clk" - for the Video Engine clock "allwinner,sun6i-a31-display-clk" - for the display clocks + "allwinner,sun8i-a83t-ccu" - for the CCU clocks/resets on A83T Required properties for all clocks: - reg : shall be the control register address for the clock. @@ -98,12 +98,13 @@ Required properties for all clocks: "allwinner,*-gates-clk", "allwinner,sun4i-pll5-clk", "allwinner,sun4i-pll6-clk", "allwinner,sun6i-a31-pll6-clk", "allwinner,*-usb-clk", "allwinner,*-mmc-clk", - "allwinner,*-mmc-config-clk" + "allwinner,*-mmc-config-clk", + "allwinner,*-ccu" - clock-output-names : shall be the corresponding names of the outputs. If the clock module only has one output, the name shall be the module name. -And "allwinner,*-usb-clk" clocks also require: +"allwinner,*-usb-clk" and "allwinner,*-ccu" clocks also require: - reset-cells : shall be set to 1 The "allwinner,sun4i-a10-ve-clk" clock also requires: diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index d3473f8..6e0acca 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -45,9 +45,10 @@ #include "skeleton.dtsi" +#include #include - #include +#include / { interrupt-parent = <&gic>; @@ -138,13 +139,13 @@ clock-output-names = "osc16M"; }; - osc16Md512: osc16Md512_clk { + osc32k: osc32k_clk { #clock-cells = <0>; compatible = "fixed-factor-clock"; clock-div = <512>; clock-mult = <1>; clocks = <&osc16M>; - clock-output-names = "osc16M-d512"; + clock-output-names = "osc32k"; }; }; @@ -154,13 +155,20 @@ #size-cells = <1>; ranges; + ccu: clock@01c20000 { + compatible = "allwinner,sun8i-a83t-ccu"; + reg = <0x01c20000 0x400>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + pio: pinctrl@01c20800 { compatible = "allwinner,sun8i-a83t-pinctrl"; interrupts = , , ; reg = <0x01c20800 0x400>; - clocks = <&osc24M>; + clocks = <&ccu CLK_BUS_PIO>; gpio-controller; interrupt-controller; #interrupt-cells = <3>;