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(p200300C6EBDC4000BD3427CB45EFF408.dip0.t-ipconnect.de. [2003:c6:ebdc:4000:bd34:27cb:45ef:f408]) by smtp.googlemail.com with ESMTPSA id y1sm18804322wme.15.2017.02.21.12.11.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 21 Feb 2017 12:11:49 -0800 (PST) From: Heiner Kallweit To: Jerome Brunet , Kevin Hilman , Herbert Xu , Neil Armstrong , linux-amlogic@lists.infradead.org, linux-crypto@vger.kernel.org, Stephen Boyd , Michael Turquette Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 1/3] clk: meson-gxbb: expose clock CLKID_RNG0 Message-ID: Date: Tue, 21 Feb 2017 21:11:38 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Expose clock CLKID_RNG0 which is needed for the HW random number generator. Signed-off-by: Heiner Kallweit --- v2: - added clk and DT maintainers - split exposing the clock and using it in DT into two patches - comment out clock definition in drivers/clk/meson/gxbb.h - silently move CLKID_SPI to the right place --- drivers/clk/meson/gxbb.h | 2 +- include/dt-bindings/clock/gxbb-clkc.h | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index 8ee2022c..cbd62e46 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h @@ -193,7 +193,7 @@ /* CLKID_I2C */ /* #define CLKID_SAR_ADC */ #define CLKID_SMART_CARD 24 -#define CLKID_RNG0 25 +/* CLKID_RNG0 */ #define CLKID_UART0 26 #define CLKID_SDHC 27 #define CLKID_STREAM 28 diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index 692846c7..63f4c2c4 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -12,9 +12,10 @@ #define CLKID_FCLK_DIV4 6 #define CLKID_CLK81 12 #define CLKID_MPLL2 15 -#define CLKID_SPI 34 #define CLKID_I2C 22 #define CLKID_SAR_ADC 23 +#define CLKID_RNG0 25 +#define CLKID_SPI 34 #define CLKID_ETH 36 #define CLKID_USB0 50 #define CLKID_USB1 51