From patchwork Wed May 31 13:41:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 9757101 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 62FEC60360 for ; Wed, 31 May 2017 13:43:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5A86C284A6 for ; Wed, 31 May 2017 13:43:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4EA1F283FF; Wed, 31 May 2017 13:43:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B9958281F9 for ; Wed, 31 May 2017 13:43:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751011AbdEaNn0 (ORCPT ); Wed, 31 May 2017 09:43:26 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:39931 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751189AbdEaNmH (ORCPT ); Wed, 31 May 2017 09:42:07 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 12A7820F1D; Wed, 31 May 2017 15:42:05 +0200 (CEST) Received: from localhost (83.146.29.93.rev.sfr.net [93.29.146.83]) by mail.free-electrons.com (Postfix) with ESMTPSA id D685620E96; Wed, 31 May 2017 15:42:04 +0200 (CEST) From: Gregory CLEMENT To: Stephen Boyd , Mike Turquette , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory CLEMENT , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org, Nadav Haklai , Kostya Porotchkin , Neta Zur Hershkovits , Marcin Wojtas , Omri Itach , Shadi Ammouri Subject: [PATCH v2 11/11] arm64: dts: marvell: use new binding for the system controller on cp110 Date: Wed, 31 May 2017 15:41:55 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The new binding for the system controller on cp110 moved the clock controller into a subnode. This preliminary step will allow to add gpio and pinctrl subnodes. Reviewed-by: Thomas Petazzoni Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 41 ++++++------- arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 35 +++++------ 2 files changed, 41 insertions(+), 35 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi index a0f57a8e5dcb..96a4ff75b3b0 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi @@ -62,7 +62,7 @@ cpm_ethernet: ethernet@0 { compatible = "marvell,armada-7k-pp22"; reg = <0x0 0x100000>, <0x129000 0xb000>; - clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>; + clocks = <&cpm_clk 1 3>, <&cpm_clk 1 9>, <&cpm_clk 1 5>; clock-names = "pp_clk", "gop_clk", "mg_clk"; status = "disabled"; dma-coherent; @@ -97,10 +97,13 @@ }; cpm_syscon0: system-controller@440000 { - compatible = "marvell,cp110-system-controller0", - "syscon"; + compatible = "syscon", "simple-mfd"; reg = <0x440000 0x1000>; - #clock-cells = <2>; + + cpm_clk: clock { + compatible = "marvell,cp110-clock"; + #clock-cells = <2>; + }; }; cpm_rtc: rtc@284000 { @@ -115,7 +118,7 @@ "generic-ahci"; reg = <0x540000 0x30000>; interrupts = ; - clocks = <&cpm_syscon0 1 15>; + clocks = <&cpm_clk 1 15>; status = "disabled"; }; @@ -125,7 +128,7 @@ reg = <0x500000 0x4000>; dma-coherent; interrupts = ; - clocks = <&cpm_syscon0 1 22>; + clocks = <&cpm_clk 1 22>; status = "disabled"; }; @@ -135,7 +138,7 @@ reg = <0x510000 0x4000>; dma-coherent; interrupts = ; - clocks = <&cpm_syscon0 1 23>; + clocks = <&cpm_clk 1 23>; status = "disabled"; }; @@ -145,7 +148,7 @@ <0x6b0000 0x1000>; dma-coherent; msi-parent = <&gic_v2m0>; - clocks = <&cpm_syscon0 1 8>; + clocks = <&cpm_clk 1 8>; }; cpm_xor1: xor@6c0000 { @@ -154,7 +157,7 @@ <0x6d0000 0x1000>; dma-coherent; msi-parent = <&gic_v2m0>; - clocks = <&cpm_syscon0 1 7>; + clocks = <&cpm_clk 1 7>; }; cpm_spi0: spi@700600 { @@ -163,7 +166,7 @@ #address-cells = <0x1>; #size-cells = <0x0>; cell-index = <1>; - clocks = <&cpm_syscon0 1 21>; + clocks = <&cpm_clk 1 21>; status = "disabled"; }; @@ -173,7 +176,7 @@ #address-cells = <1>; #size-cells = <0>; cell-index = <2>; - clocks = <&cpm_syscon0 1 21>; + clocks = <&cpm_clk 1 21>; status = "disabled"; }; @@ -183,7 +186,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - clocks = <&cpm_syscon0 1 21>; + clocks = <&cpm_clk 1 21>; status = "disabled"; }; @@ -193,7 +196,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - clocks = <&cpm_syscon0 1 21>; + clocks = <&cpm_clk 1 21>; status = "disabled"; }; @@ -201,7 +204,7 @@ compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76"; reg = <0x760000 0x7d>; interrupts = ; - clocks = <&cpm_syscon0 1 25>; + clocks = <&cpm_clk 1 25>; status = "okay"; }; @@ -210,7 +213,7 @@ reg = <0x780000 0x300>; interrupts = ; clock-names = "core"; - clocks = <&cpm_syscon0 1 4>; + clocks = <&cpm_clk 1 4>; dma-coherent; status = "disabled"; }; @@ -227,7 +230,7 @@ ; interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", "eip"; - clocks = <&cpm_syscon0 1 26>; + clocks = <&cpm_clk 1 26>; status = "disabled"; }; }; @@ -254,7 +257,7 @@ interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; interrupts = ; num-lanes = <1>; - clocks = <&cpm_syscon0 1 13>; + clocks = <&cpm_clk 1 13>; status = "disabled"; }; @@ -281,7 +284,7 @@ interrupts = ; num-lanes = <1>; - clocks = <&cpm_syscon0 1 11>; + clocks = <&cpm_clk 1 11>; status = "disabled"; }; @@ -308,7 +311,7 @@ interrupts = ; num-lanes = <1>; - clocks = <&cpm_syscon0 1 12>; + clocks = <&cpm_clk 1 12>; status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index 9584bc8d8b3f..48a658aa5b32 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi @@ -104,10 +104,13 @@ }; cps_syscon0: system-controller@440000 { - compatible = "marvell,cp110-system-controller0", - "syscon"; + compatible = "syscon", "simple-mfd"; reg = <0x440000 0x1000>; - #clock-cells = <2>; + + cps_clk: clock { + compatible = "marvell,cp110-clock"; + #clock-cells = <2>; + }; }; cps_sata0: sata@540000 { @@ -115,7 +118,7 @@ "generic-ahci"; reg = <0x540000 0x30000>; interrupts = ; - clocks = <&cps_syscon0 1 15>; + clocks = <&cps_clk 1 15>; status = "disabled"; }; @@ -125,7 +128,7 @@ reg = <0x500000 0x4000>; dma-coherent; interrupts = ; - clocks = <&cps_syscon0 1 22>; + clocks = <&cps_clk 1 22>; status = "disabled"; }; @@ -135,7 +138,7 @@ reg = <0x510000 0x4000>; dma-coherent; interrupts = ; - clocks = <&cps_syscon0 1 23>; + clocks = <&cps_clk 1 23>; status = "disabled"; }; @@ -145,7 +148,7 @@ <0x6b0000 0x1000>; dma-coherent; msi-parent = <&gic_v2m0>; - clocks = <&cps_syscon0 1 8>; + clocks = <&cps_clk 1 8>; }; cps_xor1: xor@6c0000 { @@ -154,7 +157,7 @@ <0x6d0000 0x1000>; dma-coherent; msi-parent = <&gic_v2m0>; - clocks = <&cps_syscon0 1 7>; + clocks = <&cps_clk 1 7>; }; cps_spi0: spi@700600 { @@ -163,7 +166,7 @@ #address-cells = <0x1>; #size-cells = <0x0>; cell-index = <3>; - clocks = <&cps_syscon0 1 21>; + clocks = <&cps_clk 1 21>; status = "disabled"; }; @@ -173,7 +176,7 @@ #address-cells = <1>; #size-cells = <0>; cell-index = <4>; - clocks = <&cps_syscon0 1 21>; + clocks = <&cps_clk 1 21>; status = "disabled"; }; @@ -183,7 +186,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - clocks = <&cps_syscon0 1 21>; + clocks = <&cps_clk 1 21>; status = "disabled"; }; @@ -193,7 +196,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - clocks = <&cps_syscon0 1 21>; + clocks = <&cps_clk 1 21>; status = "disabled"; }; @@ -201,7 +204,7 @@ compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76"; reg = <0x760000 0x7d>; interrupts = ; - clocks = <&cps_syscon0 1 25>; + clocks = <&cps_clk 1 25>; status = "okay"; }; @@ -244,7 +247,7 @@ interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; interrupts = ; num-lanes = <1>; - clocks = <&cps_syscon0 1 13>; + clocks = <&cps_clk 1 13>; status = "disabled"; }; @@ -271,7 +274,7 @@ interrupts = ; num-lanes = <1>; - clocks = <&cps_syscon0 1 11>; + clocks = <&cps_clk 1 11>; status = "disabled"; }; @@ -298,7 +301,7 @@ interrupts = ; num-lanes = <1>; - clocks = <&cps_syscon0 1 12>; + clocks = <&cps_clk 1 12>; status = "disabled"; }; };