From patchwork Sat Oct 3 20:35:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Thompson X-Patchwork-Id: 7322441 X-Patchwork-Delegate: herbert@gondor.apana.org.au Return-Path: X-Original-To: patchwork-linux-crypto@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EB9F19F302 for ; Sat, 3 Oct 2015 20:36:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1C46920769 for ; Sat, 3 Oct 2015 20:36:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 43E5E20742 for ; Sat, 3 Oct 2015 20:36:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751304AbbJCUgY (ORCPT ); Sat, 3 Oct 2015 16:36:24 -0400 Received: from mail-wi0-f172.google.com ([209.85.212.172]:34637 "EHLO mail-wi0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750932AbbJCUfk (ORCPT ); Sat, 3 Oct 2015 16:35:40 -0400 Received: by wicfx3 with SMTP id fx3so72825681wic.1 for ; Sat, 03 Oct 2015 13:35:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qvTO096dLaBEgsWheCalQrA32KFmpr+D8u/5XVepHZ8=; b=LlGHdzE9w6T6/kdBUgZo9fwX12i/q8f8jVtUo749SIzg9mph3/jJmrJ3Q/DyGHkElK utXCTbdfJivGdDRF4Flo60dgYUsaGeK4s8g8V41SN2WpETkL9w85XW4RntImsWrmPpbi AqBcUuQdxoK4RfV4s2UA6u/euuvgdsgumVqO82uoC+LdtM55GlIuIVY6ftTUbPqpPEit c74HMrDr52lDILFuxVy8VIWL/K3di7G1WCQOO5PxqnDAfRLgv/CFAw5KW4PGF4GsCFm0 /cvYpmsL79/TwTy0SO5fmzx9wPniVFR+sV2tVCyumtW+Js2g3TxsDdw7MsZAdS+SihAI MYIw== X-Gm-Message-State: ALoCoQlWjI8kn/dSZC3dbfhC+LBDnVWuQmZMrtm3B2OKktpVaf6QXpI05dJNlbeOVYZHVZlRLhAO X-Received: by 10.181.29.74 with SMTP id ju10mr4098044wid.5.1443904539596; Sat, 03 Oct 2015 13:35:39 -0700 (PDT) Received: from wychelm.lan (cpc4-aztw19-0-0-cust71.18-1.cable.virginm.net. [82.33.25.72]) by smtp.gmail.com with ESMTPSA id cc8sm4642418wjc.46.2015.10.03.13.35.38 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 03 Oct 2015 13:35:38 -0700 (PDT) From: Daniel Thompson To: Matt Mackall , Herbert Xu Cc: Daniel Thompson , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, patches@linaro.org, linaro-kernel@lists.linaro.org, Maxime Coquelin , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Subject: [PATCH 1/3] dt-bindings: Document the STM32 HW RNG bindings Date: Sat, 3 Oct 2015 21:35:17 +0100 Message-Id: <1443904519-24012-2-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1443904519-24012-1-git-send-email-daniel.thompson@linaro.org> References: <1443904519-24012-1-git-send-email-daniel.thompson@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds documenttaion of device tree binds for the STM32 hardware random number generator. Signed-off-by: Daniel Thompson Acked-by: Maxime Coquelin Acked-by: Rob Herring --- .../devicetree/bindings/hwrng/stm32-rng.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwrng/stm32-rng.txt diff --git a/Documentation/devicetree/bindings/hwrng/stm32-rng.txt b/Documentation/devicetree/bindings/hwrng/stm32-rng.txt new file mode 100644 index 000000000000..47f04176f93b --- /dev/null +++ b/Documentation/devicetree/bindings/hwrng/stm32-rng.txt @@ -0,0 +1,21 @@ +STMicroelectronics STM32 HW RNG +=============================== + +The STM32 hardware random number generator is a simple fixed purpose IP and +is fully separated from other crypto functions. + +Required properties: + +- compatible : Should be "st,stm32-rng" +- reg : Should be register base and length as documented in the datasheet +- interrupts : The designated IRQ line for the RNG +- clocks : The clock needed to enable the RNG + +Example: + + rng: rng@50060800 { + compatible = "st,stm32-rng"; + reg = <0x50060800 0x400>; + interrupts = <80>; + clocks = <&rcc 0 38>; + };