From patchwork Mon Oct 19 05:00:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 7433081 X-Patchwork-Delegate: herbert@gondor.apana.org.au Return-Path: X-Original-To: patchwork-linux-crypto@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 81B8A9F30B for ; Mon, 19 Oct 2015 05:01:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BDD112062A for ; Mon, 19 Oct 2015 05:01:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CB4D620627 for ; Mon, 19 Oct 2015 05:01:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753192AbbJSFA5 (ORCPT ); Mon, 19 Oct 2015 01:00:57 -0400 Received: from mailout2.w1.samsung.com ([210.118.77.12]:21862 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753117AbbJSFAy (ORCPT ); Mon, 19 Oct 2015 01:00:54 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NWG00JWVB9F9B00@mailout2.w1.samsung.com>; Mon, 19 Oct 2015 06:00:51 +0100 (BST) X-AuditID: cbfec7f5-f794b6d000001495-9a-56247903967f Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id BC.74.05269.30974265; Mon, 19 Oct 2015 06:00:51 +0100 (BST) Received: from localhost.localdomain ([10.252.80.64]) by eusync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NWG00DJKB938H10@eusync2.samsung.com>; Mon, 19 Oct 2015 06:00:51 +0100 (BST) From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , Sylwester Nawrocki , Tomasz Figa , Michael Turquette , Stephen Boyd , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Matt Mackall , Herbert Xu , linux-crypto@vger.kernel.org Cc: Heiner Kallweit Subject: [PATCH 1/3] clk: samsung: exynos4: Add SSS gate clock Date: Mon, 19 Oct 2015 14:00:32 +0900 Message-id: <1445230834-32689-2-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1445230834-32689-1-git-send-email-k.kozlowski@samsung.com> References: <1445230834-32689-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrNLMWRmVeSWpSXmKPExsVy+t/xK7rMlSphBnOuy1vMP3KO1aL7lYzF ovczWC1evzC06H/8mtli0+NrrBYfe+6xWty/95PJ4vKuOWwWM87vY7JYsK2P0eLiKVeLw2/a WS1+nOlmsVi16w+jA7/H+xut7B6X+3qZPHbOusvuse2AqsemVZ1sHpuX1Hv0bVnF6NH3cgOj x+dNcgGcUVw2Kak5mWWpRfp2CVwZ26fuZy6Yx1XxofEWcwPjVY4uRk4OCQETiaPLb7FA2GIS F+6tZ+ti5OIQEljKKNE6+xszhPOfUeLm8iWMIFVsAsYSm5cvAasSEehhkej8944ZJMEsoCXx 6PMUVhBbWMBOYsWseWBxFgFViRMXnwLZHBy8Au4Sf84oQGyTkzh5bDJYOaeAh8TVgwfBbCGg kj0TLzFOYORdwMiwilE0tTS5oDgpPddIrzgxt7g0L10vOT93EyMkiL/uYFx6zOoQowAHoxIP 74MjSmFCrIllxZW5hxglOJiVRHj1ylTChHhTEiurUovy44tKc1KLDzFKc7AoifPO3PU+REgg PbEkNTs1tSC1CCbLxMEp1cC401FmzvkT+2fliUmK5VZOUlhpPnHK/Gn598WvSrBWVy65nX4t Mptz9inWwG36s/Ms8vijpqY8ulf+W/+k95yqk1k+M982NZ7Z0Z3y1Oe86/RXvfvrcniVDK2r zMqOKF7UWnCrnDlq34ZzTTrS90MsQz0ygpcFpcrPNHmQ913Fv2day86XL9KVWIozEg21mIuK EwHL7MW+XgIAAA== Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a gate clock for controlling all clocks of Security Sub System (SSS). Signed-off-by: Krzysztof Kozlowski Acked-by: Stephen Boyd --- drivers/clk/samsung/clk-exynos4.c | 1 + include/dt-bindings/clock/exynos4.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 7f370d3e0983..ac03e4fe2871 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -1024,6 +1024,7 @@ static struct samsung_gate_clock exynos4_gate_clks[] __initdata = { 0, 0), GATE(CLK_AC97, "ac97", "aclk100", GATE_IP_PERIL, 27, 0, 0), + GATE(CLK_SSS, "sss", "aclk133", GATE_IP_DMC, 4, 0, 0), GATE(CLK_PPMUDMC0, "ppmudmc0", "aclk133", GATE_IP_DMC, 8, 0, 0), GATE(CLK_PPMUDMC1, "ppmudmc1", "aclk133", GATE_IP_DMC, 9, 0, 0), GATE(CLK_PPMUCPU, "ppmucpu", "aclk133", GATE_IP_DMC, 10, 0, 0), diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h index c4b1676ea674..c40111f36d5e 100644 --- a/include/dt-bindings/clock/exynos4.h +++ b/include/dt-bindings/clock/exynos4.h @@ -93,6 +93,7 @@ #define CLK_SCLK_FIMG2D 177 /* gate clocks */ +#define CLK_SSS 255 #define CLK_FIMC0 256 #define CLK_FIMC1 257 #define CLK_FIMC2 258