From patchwork Tue Feb 7 08:16:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 9559375 X-Patchwork-Delegate: herbert@gondor.apana.org.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7AD7D6047A for ; Tue, 7 Feb 2017 08:17:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6FC4228210 for ; Tue, 7 Feb 2017 08:17:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 631FE281F9; Tue, 7 Feb 2017 08:17:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A204D281DB for ; Tue, 7 Feb 2017 08:17:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753411AbdBGIRl (ORCPT ); Tue, 7 Feb 2017 03:17:41 -0500 Received: from mail-qt0-f178.google.com ([209.85.216.178]:35601 "EHLO mail-qt0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753414AbdBGIRj (ORCPT ); Tue, 7 Feb 2017 03:17:39 -0500 Received: by mail-qt0-f178.google.com with SMTP id x49so127651660qtc.2 for ; Tue, 07 Feb 2017 00:17:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=73qtmIJN7a4SoFgN593KttIT5pC13ELcPynEoytN7aU=; b=biPlWYD3tKlKIG9qlE1+SmBg/xQT0pvG+9BDJhovku7dmEJlENy3jYk1FYiRi82xrQ JNHTEZyWjj0sAVL67NYWqSnM73dMIDRFaUiXttljGo8ijOtA4HE9FUYVoZLQYI7NNKY/ 2HkI6QQwpEJg+X8x1h3qx3z3sSsCPn7fbK5Cc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=73qtmIJN7a4SoFgN593KttIT5pC13ELcPynEoytN7aU=; b=jnyfBWI/WOlSSpfDurOQos3l9X2csb58il4mL086UzkG8CW/DmKGgmMrQseNtu7uVt 3GroJkhs5Gn5/EnWHkx8ZPuFDXKRlruLG1hXkA5jTpkxJcJalA6lYxg5AJsHH+HEOWB0 wjroMiNUXlmfVkX6/JTkamE7/xSTDRb40JYYNHwO+uqLYMUYedssZvAdzFgjyOO9dlBe dcnKo98crkpl+ctS7LdNWAJ0Z9DzydDepTOqr0g45YTqVO8HiBMTuk+F/F/uJ14xQBr8 fpcAPlHiYHQx16kwhuU89o8Q3MBSr1rf+floSZwSaNQ5w/4DLO1S/XErXdO3JFl4H/0s 7tXg== X-Gm-Message-State: AMke39mnFBbyxPvJL5/L8Bwp7uF0vc1C91m9/nBmabATPb/mdjkOz24zm/THWi/0P4/yLjaq X-Received: by 10.200.48.172 with SMTP id v41mr12351333qta.54.1486455453399; Tue, 07 Feb 2017 00:17:33 -0800 (PST) Received: from anup-HP-Compaq-8100-Elite-CMT-PC.dhcp.avagotech.net ([192.19.237.250]) by smtp.gmail.com with ESMTPSA id u5sm2750555qkd.46.2017.02.07.00.17.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Feb 2017 00:17:32 -0800 (PST) From: Anup Patel To: Vinod Koul , Rob Herring , Mark Rutland , Herbert Xu , "David S . Miller" , Jassi Brar Cc: Dan Williams , Ray Jui , Scott Branden , Jon Mason , Rob Rice , bcm-kernel-feedback-list@broadcom.com, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, linux-raid@vger.kernel.org, Anup Patel Subject: [PATCH v2 3/5] async_tx: Fix DMA_PREP_FENCE usage in do_async_gen_syndrome() Date: Tue, 7 Feb 2017 13:46:44 +0530 Message-Id: <1486455406-11202-4-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486455406-11202-1-git-send-email-anup.patel@broadcom.com> References: <1486455406-11202-1-git-send-email-anup.patel@broadcom.com> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The DMA_PREP_FENCE is to be used when preparing Tx descriptor if output of Tx descriptor is to be used by next/dependent Tx descriptor. The DMA_PREP_FENSE will not be set correctly in do_async_gen_syndrome() when calling dma->device_prep_dma_pq() under following conditions: 1. ASYNC_TX_FENCE not set in submit->flags 2. DMA_PREP_FENCE not set in dma_flags 3. src_cnt (= (disks - 2)) is greater than dma_maxpq(dma, dma_flags) This patch fixes DMA_PREP_FENCE usage in do_async_gen_syndrome() taking inspiration from do_async_xor() implementation. Signed-off-by: Anup Patel Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- crypto/async_tx/async_pq.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/crypto/async_tx/async_pq.c b/crypto/async_tx/async_pq.c index 16c6526..947cf35 100644 --- a/crypto/async_tx/async_pq.c +++ b/crypto/async_tx/async_pq.c @@ -62,9 +62,6 @@ do_async_gen_syndrome(struct dma_chan *chan, dma_addr_t dma_dest[2]; int src_off = 0; - if (submit->flags & ASYNC_TX_FENCE) - dma_flags |= DMA_PREP_FENCE; - while (src_cnt > 0) { submit->flags = flags_orig; pq_src_cnt = min(src_cnt, dma_maxpq(dma, dma_flags)); @@ -83,6 +80,8 @@ do_async_gen_syndrome(struct dma_chan *chan, if (cb_fn_orig) dma_flags |= DMA_PREP_INTERRUPT; } + if (submit->flags & ASYNC_TX_FENCE) + dma_flags |= DMA_PREP_FENCE; /* Drivers force forward progress in case they can not provide * a descriptor