| Message ID | 20210707181506.30489-5-brijesh.singh@amd.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Delegated to: | Herbert Xu |
| Headers | show |
| Series | Add AMD Secure Nested Paging (SEV-SNP) Guest Support | expand |
* Brijesh Singh (brijesh.singh@amd.com) wrote: > The sev_feature_enabled() helper can be used by the guest to query whether > the SNP - Secure Nested Paging feature is active. > > Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> > --- > arch/x86/include/asm/mem_encrypt.h | 8 ++++++++ > arch/x86/include/asm/msr-index.h | 2 ++ > arch/x86/mm/mem_encrypt.c | 14 ++++++++++++++ > 3 files changed, 24 insertions(+) > > diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h > index 8cc2fd308f65..fb857f2e72cb 100644 > --- a/arch/x86/include/asm/mem_encrypt.h > +++ b/arch/x86/include/asm/mem_encrypt.h > @@ -16,6 +16,12 @@ > > #include <asm/bootparam.h> > > +enum sev_feature_type { > + SEV, > + SEV_ES, > + SEV_SNP > +}; Is this .... > #ifdef CONFIG_AMD_MEM_ENCRYPT > > extern u64 sme_me_mask; > @@ -54,6 +60,7 @@ void __init sev_es_init_vc_handling(void); > bool sme_active(void); > bool sev_active(void); > bool sev_es_active(void); > +bool sev_feature_enabled(unsigned int feature_type); > > #define __bss_decrypted __section(".bss..decrypted") > > @@ -87,6 +94,7 @@ static inline int __init > early_set_memory_encrypted(unsigned long vaddr, unsigned long size) { return 0; } > > static inline void mem_encrypt_free_decrypted_mem(void) { } > +static bool sev_feature_enabled(unsigned int feature_type) { return false; } > > #define __bss_decrypted > > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index a7c413432b33..37589da0282e 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -481,8 +481,10 @@ > #define MSR_AMD64_SEV 0xc0010131 > #define MSR_AMD64_SEV_ENABLED_BIT 0 > #define MSR_AMD64_SEV_ES_ENABLED_BIT 1 > +#define MSR_AMD64_SEV_SNP_ENABLED_BIT 2 Just the same as this ? > #define MSR_AMD64_SEV_ENABLED BIT_ULL(MSR_AMD64_SEV_ENABLED_BIT) > #define MSR_AMD64_SEV_ES_ENABLED BIT_ULL(MSR_AMD64_SEV_ES_ENABLED_BIT) > +#define MSR_AMD64_SEV_SNP_ENABLED BIT_ULL(MSR_AMD64_SEV_SNP_ENABLED_BIT) > > #define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f > > diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c > index ff08dc463634..63e7799a9a86 100644 > --- a/arch/x86/mm/mem_encrypt.c > +++ b/arch/x86/mm/mem_encrypt.c > @@ -389,6 +389,16 @@ bool noinstr sev_es_active(void) > return sev_status & MSR_AMD64_SEV_ES_ENABLED; > } > > +bool sev_feature_enabled(unsigned int type) In which case, if you want the enum then that would be enum sev_feature_type type ? > +{ > + switch (type) { > + case SEV: return sev_status & MSR_AMD64_SEV_ENABLED; > + case SEV_ES: return sev_status & MSR_AMD64_SEV_ES_ENABLED; > + case SEV_SNP: return sev_status & MSR_AMD64_SEV_SNP_ENABLED; > + default: return false; or, could you just go for making that whole thing a bit test on 1<<type ? > + } > +} > + > /* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */ > bool force_dma_unencrypted(struct device *dev) > { > @@ -461,6 +471,10 @@ static void print_mem_encrypt_feature_info(void) > if (sev_es_active()) > pr_cont(" SEV-ES"); > > + /* Secure Nested Paging */ > + if (sev_feature_enabled(SEV_SNP)) > + pr_cont(" SEV-SNP"); > + > pr_cont("\n"); > } Dave > -- > 2.17.1 > >
On 08/07/21 10:50, Dr. David Alan Gilbert wrote: >> +enum sev_feature_type { >> + SEV, >> + SEV_ES, >> + SEV_SNP >> +}; > Is this .... > >> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h >> index a7c413432b33..37589da0282e 100644 >> --- a/arch/x86/include/asm/msr-index.h >> +++ b/arch/x86/include/asm/msr-index.h >> @@ -481,8 +481,10 @@ >> #define MSR_AMD64_SEV 0xc0010131 >> #define MSR_AMD64_SEV_ENABLED_BIT 0 >> #define MSR_AMD64_SEV_ES_ENABLED_BIT 1 >> +#define MSR_AMD64_SEV_SNP_ENABLED_BIT 2 > Just the same as this ? > No, it's just a coincidence. Paolo
On Wed, Jul 07, 2021 at 01:14:34PM -0500, Brijesh Singh wrote: > The sev_feature_enabled() helper can be used by the guest to query whether > the SNP - Secure Nested Paging feature is active. > > Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> > --- > arch/x86/include/asm/mem_encrypt.h | 8 ++++++++ > arch/x86/include/asm/msr-index.h | 2 ++ > arch/x86/mm/mem_encrypt.c | 14 ++++++++++++++ > 3 files changed, 24 insertions(+) This will get replaced by this I presume: https://lkml.kernel.org/r/cover.1627424773.git.thomas.lendacky@amd.com
On 8/10/21 6:25 AM, Borislav Petkov wrote: > On Wed, Jul 07, 2021 at 01:14:34PM -0500, Brijesh Singh wrote: >> The sev_feature_enabled() helper can be used by the guest to query whether >> the SNP - Secure Nested Paging feature is active. >> >> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> >> --- >> arch/x86/include/asm/mem_encrypt.h | 8 ++++++++ >> arch/x86/include/asm/msr-index.h | 2 ++ >> arch/x86/mm/mem_encrypt.c | 14 ++++++++++++++ >> 3 files changed, 24 insertions(+) > > This will get replaced by this I presume: > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.kernel.org%2Fr%2Fcover.1627424773.git.thomas.lendacky%40amd.com&data=04%7C01%7Cbrijesh.singh%40amd.com%7C15d8b87644e148488da408d95bf16ae3%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637641914718165877%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=UMRigkWSG2h%2BZ4L08AUlG0JeUiqMb9te52LprPrq51M%3D&reserved=0 > Yes. thanks
diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 8cc2fd308f65..fb857f2e72cb 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -16,6 +16,12 @@ #include <asm/bootparam.h> +enum sev_feature_type { + SEV, + SEV_ES, + SEV_SNP +}; + #ifdef CONFIG_AMD_MEM_ENCRYPT extern u64 sme_me_mask; @@ -54,6 +60,7 @@ void __init sev_es_init_vc_handling(void); bool sme_active(void); bool sev_active(void); bool sev_es_active(void); +bool sev_feature_enabled(unsigned int feature_type); #define __bss_decrypted __section(".bss..decrypted") @@ -87,6 +94,7 @@ static inline int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size) { return 0; } static inline void mem_encrypt_free_decrypted_mem(void) { } +static bool sev_feature_enabled(unsigned int feature_type) { return false; } #define __bss_decrypted diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index a7c413432b33..37589da0282e 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -481,8 +481,10 @@ #define MSR_AMD64_SEV 0xc0010131 #define MSR_AMD64_SEV_ENABLED_BIT 0 #define MSR_AMD64_SEV_ES_ENABLED_BIT 1 +#define MSR_AMD64_SEV_SNP_ENABLED_BIT 2 #define MSR_AMD64_SEV_ENABLED BIT_ULL(MSR_AMD64_SEV_ENABLED_BIT) #define MSR_AMD64_SEV_ES_ENABLED BIT_ULL(MSR_AMD64_SEV_ES_ENABLED_BIT) +#define MSR_AMD64_SEV_SNP_ENABLED BIT_ULL(MSR_AMD64_SEV_SNP_ENABLED_BIT) #define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index ff08dc463634..63e7799a9a86 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -389,6 +389,16 @@ bool noinstr sev_es_active(void) return sev_status & MSR_AMD64_SEV_ES_ENABLED; } +bool sev_feature_enabled(unsigned int type) +{ + switch (type) { + case SEV: return sev_status & MSR_AMD64_SEV_ENABLED; + case SEV_ES: return sev_status & MSR_AMD64_SEV_ES_ENABLED; + case SEV_SNP: return sev_status & MSR_AMD64_SEV_SNP_ENABLED; + default: return false; + } +} + /* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */ bool force_dma_unencrypted(struct device *dev) { @@ -461,6 +471,10 @@ static void print_mem_encrypt_feature_info(void) if (sev_es_active()) pr_cont(" SEV-ES"); + /* Secure Nested Paging */ + if (sev_feature_enabled(SEV_SNP)) + pr_cont(" SEV-SNP"); + pr_cont("\n"); }
The sev_feature_enabled() helper can be used by the guest to query whether the SNP - Secure Nested Paging feature is active. Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> --- arch/x86/include/asm/mem_encrypt.h | 8 ++++++++ arch/x86/include/asm/msr-index.h | 2 ++ arch/x86/mm/mem_encrypt.c | 14 ++++++++++++++ 3 files changed, 24 insertions(+)