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Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Borislav Petkov , Michael Roth , Vlastimil Babka , tony.luck@intel.com, npmccallum@redhat.com, brijesh.ksingh@gmail.com, Brijesh Singh Subject: [PATCH Part2 RFC v4 08/40] x86/traps: Define RMP violation #PF error code Date: Wed, 7 Jul 2021 13:35:44 -0500 Message-Id: <20210707183616.5620-9-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210707183616.5620-1-brijesh.singh@amd.com> References: <20210707183616.5620-1-brijesh.singh@amd.com> X-ClientProxiedBy: SN6PR04CA0078.namprd04.prod.outlook.com (2603:10b6:805:f2::19) To BYAPR12MB2711.namprd12.prod.outlook.com (2603:10b6:a03:63::10) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SN6PR04CA0078.namprd04.prod.outlook.com (2603:10b6:805:f2::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4308.20 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: jdyh7sBb/cS1c4r44HyT/ONOzqq8PSKrETLgJhO4NbjtznvbZMTHRLhYvkwJhvXpFa5TGmV1E/Uv5OnkvrsVBPTH9vwosOqAwIKzN3YZULH8A8+EzpNR0fzcIpLxAO/AkK4QvNxvHWzWvZ2N9Xk0/DFG7/zC0auVuW7cth/XpQmdZfFBmXhIpCds/YbJ14W8VKrIJ9wXOQYsdbl61kDolbki/9t7cHBy8FxnA4YWdFUleuR0a3fOGbdPURdSZMMrpDCoORrD3HtkNWGAFk3glOXzb9d/sYhxs528eDX6gkDF9yIJ+zp6koYmwnajPltfIgIUOUGwzRi4K/pV9z4da4/azpNCDoK5DTqS7j+cipvLU5jIpReFQ8lRZcadYRyVlMkHHwlmgMBgWnnRx8EZmAz1Tw+88rkXpmqf45bTpwaWuHkxmOSUIY/iEppHkxZ5ltNrwOC6ygsZXfZ1FEdUFmo9tQ1rWZ99rKHflPxiVDQUM17qGf16xCbCY/78R697hEtcRGavqZxlWTod8O1dEewu6SxuOFR2DHps0RqnLTI9Ri0bY7NHULqlsx3+VG8WevFZEu0TI/rDzg21PAB+z0lnas5m7yrdVtN6qDXaSr7DjA1Qpwb2yP5/grmGROjlXvh2yl/etWpcsWaKKvBINqz1rP4ryqTYf0DEpwZrp7iCy+nQ+jUX1t7Xnu/syc/uo1KG5Ng6PCWNYQ8KAcK/Jszmj8Qbm906dcdX2AskY6pNWIj27eb08+AQy06UVqUAKRWCNSN5AEx6e2Kh0aAqaJEx12voTCV89jiPBSVN1jm5Dbd967c+NN4tGS2AWjYfq8+hzZN3QUYzUylnYpbxNLK9IOMrlOBwv7BE5zKn0mNs4J5IIMubhxehSO38LRAm+cey67uKL54d1g4SUbNNJUXNcE+mi2x74PMKN0AkgaevylHf/Z/H5ikdmXXG7zDY8nz/ynPaN/VNtFPJwi/i2dkT4GPMlz9EE+J3cGqD3nlGa2lZFTOJGi2cgE8CPVGcTtnOvJ39iQXyZLxqLVV0aNwyubp3KUa399aw/D6IXhnvd/7wuicA/qBq7nhTQQ/D2prMqgea0qHipBDGv/jA/6XrQY+UzA1TaD5QxQWStbm2L36txayQrGDBeACtnuSaZEy6RxfMo26qsika0svphuWNtxPNDmstn4JqEUys4KB6o3X2BVFj7ddI3w7C7qwBwyoWcelVI44U5I3I9IOEsT5MaGoHvrug6LN6s97EO5Nbkh/RuuultAv5c2ypIIEVeK6QuTs5X5JXisvu6ERRE+gBQ0gaX+u8KKtf3ZSt+58UU4ZPL4SWmtOS9xa0SZA3 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: c8b16327-605e-4cba-bf02-08d941763dce X-MS-Exchange-CrossTenant-AuthSource: BYAPR12MB2711.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jul 2021 18:37:15.0450 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jgRyfCiHafadZfOBrWI9lR3igvVDlpE4spvs2AEYxamcqBhsZ/XjmSt/4Tdm8p00EjZd4ruE9hfr/hcBvmp0wg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB2808 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Bit 31 in the page fault-error bit will be set when processor encounters an RMP violation. While at it, use the BIT() macro. Signed-off-by: Brijesh Singh --- arch/x86/include/asm/trap_pf.h | 18 +++++++++++------- arch/x86/mm/fault.c | 1 + 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/trap_pf.h b/arch/x86/include/asm/trap_pf.h index 10b1de500ab1..29f678701753 100644 --- a/arch/x86/include/asm/trap_pf.h +++ b/arch/x86/include/asm/trap_pf.h @@ -2,6 +2,8 @@ #ifndef _ASM_X86_TRAP_PF_H #define _ASM_X86_TRAP_PF_H +#include /* BIT() macro */ + /* * Page fault error code bits: * @@ -12,15 +14,17 @@ * bit 4 == 1: fault was an instruction fetch * bit 5 == 1: protection keys block access * bit 15 == 1: SGX MMU page-fault + * bit 31 == 1: fault was an RMP violation */ enum x86_pf_error_code { - X86_PF_PROT = 1 << 0, - X86_PF_WRITE = 1 << 1, - X86_PF_USER = 1 << 2, - X86_PF_RSVD = 1 << 3, - X86_PF_INSTR = 1 << 4, - X86_PF_PK = 1 << 5, - X86_PF_SGX = 1 << 15, + X86_PF_PROT = BIT(0), + X86_PF_WRITE = BIT(1), + X86_PF_USER = BIT(2), + X86_PF_RSVD = BIT(3), + X86_PF_INSTR = BIT(4), + X86_PF_PK = BIT(5), + X86_PF_SGX = BIT(15), + X86_PF_RMP = BIT(31), }; #endif /* _ASM_X86_TRAP_PF_H */ diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index 1c548ad00752..2715240c757e 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -545,6 +545,7 @@ show_fault_oops(struct pt_regs *regs, unsigned long error_code, unsigned long ad !(error_code & X86_PF_PROT) ? "not-present page" : (error_code & X86_PF_RSVD) ? "reserved bit violation" : (error_code & X86_PF_PK) ? "protection keys violation" : + (error_code & X86_PF_RMP) ? "rmp violation" : "permissions violation"); if (!(error_code & X86_PF_USER) && user_mode(regs)) {