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Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Borislav Petkov , Michael Roth , Vlastimil Babka , "Kirill A . Shutemov" , Andi Kleen , tony.luck@intel.com, marcorr@google.com, sathyanarayanan.kuppuswamy@linux.intel.com, Sean Christopherson , Isaku Yamahata , Brijesh Singh Subject: [PATCH Part2 v5 29/45] KVM: x86/mmu: Move 'pfn' variable to caller of direct_page_fault() Date: Fri, 20 Aug 2021 10:59:02 -0500 Message-Id: <20210820155918.7518-30-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210820155918.7518-1-brijesh.singh@amd.com> References: <20210820155918.7518-1-brijesh.singh@amd.com> X-ClientProxiedBy: SN7P222CA0013.NAMP222.PROD.OUTLOOK.COM (2603:10b6:806:124::11) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SN7P222CA0013.NAMP222.PROD.OUTLOOK.COM (2603:10b6:806:124::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4436.18 via Frontend Transport; Fri, 20 Aug 2021 16:00:30 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: bcce6a3b-6040-41ec-dc34-08d963f3a2d1 X-MS-TrafficTypeDiagnostic: SA0PR12MB4574: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: M9att/wIobPuR7DMZCp5wjc2+dPxDsq79PFLFu3tPKHQVDqT7HcpkiovzC7ufhPukshDAC0tC7dMnSpji/fOvLrfgAF7mBgoOUAUYTBUXlGmcExlHRnWyDTdHba4TPJlWj6wF8nizQyK3qBKvLC9pQU6LmeMnYyANwM2A3k9e7AZPCNhEM+wUVdsHi/0dctrloCY236I7jMeevi9bZ+wIP1G1tvAGlqkPaypOnCdCSZsA8p0n5GWH+Y6SBRIIeUJ8r3+rgROcQZ4BaF5TSHj5I3woLem9xgWkykf40lZ7KWCK07fBJ8a4sLOGqgxr72mJ+3mzw/qO64Ae0NhojP/2w5qrLpxjErCutJingRIK6ZuFy0DYv2Msvuva/WGelb5LFQMRfVi/pwQbCGKqIzD3ua5nAFHaQQEXNJ5146D+/Xshe+ldwa5SYxC42GwXZm7dGAbO9wjS/DpminESaKaIbj2jtuD1tLLGtAYn0bauXCT9cV5c8temRGP95zXHTrOECczBrF6dWxlBmvqFBJvxU9y9b8DLdpkq7JqwUJQy8ffRaeVbOfLqVhChTMVQjZfvjrE09+OxhpmGQrSskN1l6MqnuqAzJFWqgGfywqnqK2LPJqGA0gyrHKDzCOvqXzX5lEbLDSL4Tfen60WpKUC8IhIeq3sB+RiPh7WcO3OQ5rlKLG9RrIQ3mBGsEWOKjpW X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SN6PR12MB2718.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFS:(4636009)(136003)(376002)(396003)(346002)(366004)(39860400002)(1076003)(38100700002)(316002)(38350700002)(5660300002)(26005)(44832011)(4326008)(66556008)(54906003)(7416002)(7406005)(8676002)(66476007)(86362001)(66946007)(6666004)(2616005)(956004)(8936002)(2906002)(36756003)(83380400001)(478600001)(6486002)(7696005)(52116002)(186003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: cIGayO6VQWZMGOSwyEpX5qYlxiBNC/LsUkdz+oa5sbNJQQIBXLl1vvAUxVE9S1VamTYxHf/4GUOLZ6lGbjxs8WajPWcwR6sFyEbpI4QP34FBrAJ/1eF1wgiv+wZBDFv4Q0qRA1IT5Mtd7lm2lw2CIkhRMD94t9qS70fNEOWjUBi6x8+B8vpYr5VBQxtQmHgnC5+DswhvUXzVkZOXzj6f1zA6zM78JDfF1KOlPCYBU2X+ZQmOSvKxO6TNPw/IE4w+brZOmWeSTaYGRBq4iFvrVx0r5YTgljbW0yCMFHJFh4R+6jg2SUWXtONGXMD+i8uRBHaWSAR8dILohqkDT4cBbMJ2KIBGGDmwJTiOY2LLppss22vbTYU2lK0e7bx1YwfuIZXboLHrNh2ZUrOdwjAmOf2eOwWBbjeZj+4qSVdqezlA3F4OzR0hWS2j5JmplpwAj/tw4EgaCVj07fz5g4+WYmd2Qw9wcj877K5vD1JTuEysc9x8iVCwFsi5hESMby+XHI0d2/nc22LBz9n/+sboQ9plQuYt8jKnvWp4EHXubUmO4wtfC8VAjophWEpru040gZo5B/MxEpf0LStFchsmooLiCeMXFS85qSgriWM8PvfhcgXaTCNXQFp7JfCBqfqOD3CpHZLYRvR+AO9EBM1O+bHNeACWoZbVEhQMarL4OMFtqXIRkVC4xhfVKsvGRtVOZL9+8PK1cUPbCi2eIX/hWefa2aSaqc+q/ty6l95twcrDlo/yTcc4OpKcGkPNBYZqvTnHqiRejJxury3qFBSKOAzO0ibS/OMIFisIfw1QY1bjDOcubK+kxgYJdaplGGnQVj0cx2o8Brdztu8bPjVjj+4/Bt3j3TczQXVr6eUMMxKUhJ89fOQ1jva3qks5RsknW8rtHbS94wTQX06B4y+i3SH8SWrVGRsTXKRhxGRdR6awl2GR4YsNvWpNAVTQ6peKAvxviyFxlOee7fqVshzEjnZg+Kl9ZIGaXu/4vtIOzCy7+azP5AafAiHUznmxwN/kKeSWLvj/8ZXm2p244d1sfxnccUGVqCBroYW54dT4R+BsTeObbfAgFBC83GqRoKZdbURZXCPxhha60c2FNee4WH03U7I5swzOo9UgLhNBf4+9Uts3NftkRmz18TSlQqtF72Dxw2QbI+kw9woTIz9F9S/aqxTNANN6arMYmbM+Nxv6SkDWvXp06UQWBrv44hFtoHJe5wZDQ4/nn8iP1owD/JgzHA4mk2TM/StlIbld3cGn4iF1XlMQS3XMOFTMMkgSOnWXbND9spc+YGrkindCq2PJXH7Vf0dyvO9kwRT2g4UT6bWhjgmPsB4Fqacoj2pv X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: bcce6a3b-6040-41ec-dc34-08d963f3a2d1 X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Aug 2021 16:00:31.1349 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: trFu30FXbzrDJcFnyVcV320V8F4Hd0w0VWgyD4CfuopFLhhbv0GmPQgZRiIK+lzKTTo9cScAQztgHcJakPK0Vw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4574 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org From: Sean Christopherson When adding pages prior to boot, TDX will need the resulting host pfn so that it can be passed to TDADDPAGE (TDX-SEAM always works with physical addresses as it has its own page tables). Start plumbing pfn back up the page fault stack. Signed-off-by: Sean Christopherson Signed-off-by: Isaku Yamahata Signed-off-by: Brijesh Singh --- arch/x86/kvm/mmu/mmu.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index f9aaf6e1e51e..5cbcbedcaaa6 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -3818,7 +3818,8 @@ static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, } static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, - bool prefault, int max_level, bool is_tdp) + bool prefault, int max_level, bool is_tdp, + kvm_pfn_t *pfn) { bool is_tdp_mmu_fault = is_tdp_mmu(vcpu->arch.mmu); bool write = error_code & PFERR_WRITE_MASK; @@ -3826,7 +3827,6 @@ static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, gfn_t gfn = gpa >> PAGE_SHIFT; unsigned long mmu_seq; - kvm_pfn_t pfn; hva_t hva; int r; @@ -3846,11 +3846,11 @@ static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, mmu_seq = vcpu->kvm->mmu_notifier_seq; smp_rmb(); - if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, &hva, + if (try_async_pf(vcpu, prefault, gfn, gpa, pfn, &hva, write, &map_writable)) return RET_PF_RETRY; - if (handle_abnormal_pfn(vcpu, is_tdp ? 0 : gpa, gfn, pfn, ACC_ALL, &r)) + if (handle_abnormal_pfn(vcpu, is_tdp ? 0 : gpa, gfn, *pfn, ACC_ALL, &r)) return r; r = RET_PF_RETRY; @@ -3860,7 +3860,8 @@ static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, else write_lock(&vcpu->kvm->mmu_lock); - if (!is_noslot_pfn(pfn) && mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, hva)) + if (!is_noslot_pfn(*pfn) && + mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, hva)) goto out_unlock; r = make_mmu_pages_available(vcpu); if (r) @@ -3868,9 +3869,9 @@ static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, if (is_tdp_mmu_fault) r = kvm_tdp_mmu_map(vcpu, gpa, error_code, map_writable, max_level, - pfn, prefault); + *pfn, prefault); else - r = __direct_map(vcpu, gpa, error_code, map_writable, max_level, pfn, + r = __direct_map(vcpu, gpa, error_code, map_writable, max_level, *pfn, prefault, is_tdp); out_unlock: @@ -3878,18 +3879,20 @@ static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, read_unlock(&vcpu->kvm->mmu_lock); else write_unlock(&vcpu->kvm->mmu_lock); - kvm_release_pfn_clean(pfn); + kvm_release_pfn_clean(*pfn); return r; } static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, bool prefault) { + kvm_pfn_t pfn; + pgprintk("%s: gva %lx error %x\n", __func__, gpa, error_code); /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ return direct_page_fault(vcpu, gpa & PAGE_MASK, error_code, prefault, - PG_LEVEL_2M, false); + PG_LEVEL_2M, false, &pfn); } int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, @@ -3928,6 +3931,7 @@ EXPORT_SYMBOL_GPL(kvm_handle_page_fault); int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, bool prefault) { + kvm_pfn_t pfn; int max_level; for (max_level = KVM_MAX_HUGEPAGE_LEVEL; @@ -3941,7 +3945,7 @@ int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, } return direct_page_fault(vcpu, gpa, error_code, prefault, - max_level, true); + max_level, true, &pfn); } static void nonpaging_init_context(struct kvm_mmu *context)