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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id o7-20020a05651205c700b0047f7419de4asm901127lfo.180.2022.07.25.07.07.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Jul 2022 07:07:27 -0700 (PDT) From: Linus Walleij To: linux-crypto@vger.kernel.org, Herbert Xu , "David S . Miller" Cc: phone-devel@vger.kernel.org, Stefan Hansson , Linus Walleij Subject: [PATCH 05/15 v2] crypto: ux500/hash: Drop bit index Date: Mon, 25 Jul 2022 16:04:54 +0200 Message-Id: <20220725140504.2398965-6-linus.walleij@linaro.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220725140504.2398965-1-linus.walleij@linaro.org> References: <20220725140504.2398965-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org This is some leftover code because the field is only referenced in a debug print and never assigned. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - No changes --- drivers/crypto/ux500/hash/hash_alg.h | 4 ---- drivers/crypto/ux500/hash/hash_core.c | 4 ++-- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/crypto/ux500/hash/hash_alg.h b/drivers/crypto/ux500/hash/hash_alg.h index 26e8b7949d7c..00730c0090ae 100644 --- a/drivers/crypto/ux500/hash/hash_alg.h +++ b/drivers/crypto/ux500/hash/hash_alg.h @@ -217,7 +217,6 @@ struct hash_register { * @buffer: Working buffer for messages going to the hardware. * @length: Length of the part of message hashed so far (floor(N/64) * 64). * @index: Valid number of bytes in buffer (N % 64). - * @bit_index: Valid number of bits in buffer (N % 8). * * This structure is used between context switches, i.e. when ongoing jobs are * interupted with new jobs. When this happens we need to store intermediate @@ -237,7 +236,6 @@ struct hash_state { u32 buffer[HASH_BLOCK_SIZE / sizeof(u32)]; struct uint64 length; u8 index; - u8 bit_index; }; /** @@ -358,7 +356,6 @@ struct hash_req_ctx { * @power_state_lock: Spinlock for power_state. * @regulator: Pointer to the device's power control. * @clk: Pointer to the device's clock control. - * @restore_dev_state: TRUE = saved state, FALSE = no saved state. * @dma: Structure used for dma. */ struct hash_device_data { @@ -372,7 +369,6 @@ struct hash_device_data { spinlock_t power_state_lock; struct regulator *regulator; struct clk *clk; - bool restore_dev_state; struct hash_state state; /* Used for saving and resuming state */ struct hash_dma dma; }; diff --git a/drivers/crypto/ux500/hash/hash_core.c b/drivers/crypto/ux500/hash/hash_core.c index e6e3a91ae795..e9962c8a29bd 100644 --- a/drivers/crypto/ux500/hash/hash_core.c +++ b/drivers/crypto/ux500/hash/hash_core.c @@ -991,8 +991,8 @@ int hash_hw_update(struct ahash_request *req) } req_ctx->state.index = index; - dev_dbg(device_data->dev, "%s: indata length=%d, bin=%d\n", - __func__, req_ctx->state.index, req_ctx->state.bit_index); + dev_dbg(device_data->dev, "%s: indata length=%d\n", + __func__, req_ctx->state.index); return 0; }