From patchwork Sun Jan 26 18:59:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 13950817 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90C4317D358; Sun, 26 Jan 2025 18:59:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737917946; cv=none; b=EEAJYTMWeLdtE4PMXvexkxMkEqkRwX3NENONVG//LuWWtPeXHg5i9TBH7Qw6B6NPjyXfFZc0nzEjBg6b14bD9vdMn2ewb0wUgeES4H4yusu90VLLwyAKHzcxHGjciY7tbfj0lEuNrIzT9GGlGhXGpIxIDHPZsNxdZHyYGTDwnFo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737917946; c=relaxed/simple; bh=r6w1TGpVSqKoSAo8UJWjBKkemEchRp94CZSpKLCcVic=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=q5Gdpi+bvQl0+GHVES64KVG7CdgOXI0Y1/xKQkIX5DbEdlslSNpYDRP9wdEH56yMgEoFXHbFi3XaS6nC1E6eE2k4IiRgP9sUBcPyd99S3ooPPH6ZiIgIDgTgC9t7on1EYMKblckk/J3iCmMUeG8qR98h5merQABb84TH5Q1gWmc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VKQA9VPT; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VKQA9VPT" Received: by smtp.kernel.org (Postfix) with ESMTPS id 11B3FC19422; Sun, 26 Jan 2025 18:59:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1737917946; bh=r6w1TGpVSqKoSAo8UJWjBKkemEchRp94CZSpKLCcVic=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=VKQA9VPTPYPBXavTlj/t8VBkruGrWrint1cIPRTVYmzKcYSkLCACJ3dkx6YFGD5aF I5j0anMoe7fWtO3sLpUNV/oYGmyZ6Pd/1IMgKDwtellO9zkx0HriAYlpGLEZ/hmMXU X9JdBEmd63a57sa6SmidOk6bIjwFXbcLPOcE4pBEEPJRcMZE8RpbPZ0R5rRqT/aSkI qLEU8dB2BSh7PNeKGe0KN7uw1wf0MLOqPex7UWVF4pcFmavGTl0z0ngohluNmDNOtz xsmoello/jN78f1HAh4FwkYSl6GQEzR0w9qf1u6Zl3fdiae50NcCD6vrAii4IvLEl2 1iBMXM+cQuCOQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05F5BC0218D; Sun, 26 Jan 2025 18:59:06 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Sun, 26 Jan 2025 19:59:02 +0100 Subject: [PATCH 7/9] dt-bindings: watchdog: Convert mpc8xxx-wdt binding to YAML Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250126-ppcyaml-v1-7-50649f51c3dd@posteo.net> References: <20250126-ppcyaml-v1-0-50649f51c3dd@posteo.net> In-Reply-To: <20250126-ppcyaml-v1-0-50649f51c3dd@posteo.net> To: devicetree@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: Scott Wood , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Damien Le Moal , Niklas Cassel , Herbert Xu , "David S. Miller" , Lee Jones , Vinod Koul , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , =?utf-8?q?J=2E_Neusch=C3=A4fer?= , Wim Van Sebroeck , Guenter Roeck , Mark Brown , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org, linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org, linux-pci@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org, =?utf-8?q?J=2E_N?= =?utf-8?q?eusch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1737917943; l=3719; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=INVkBCLHOPyRZgA3id7yu3YiJSlbpT9rkFYnjOPWGRw=; b=qIrd3NqNYsZmRHz4Bp4oEm0lNDz7AgiaFpCxd9WVkNnHgQgErhQ8oTpycy+6fz5u6+yLeokS7 DjGnZr5OgjSAQorB4z4FQuYzKQmxCRJELg+Xp55lZMxlrTDHbra662w X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net From: "J. Neuschäfer" Convert mpc83xx-wdt.txt to YAML to enable automatic schema validation. Signed-off-by: J. Neuschäfer Reviewed-by: Rob Herring (Arm) --- .../devicetree/bindings/watchdog/mpc8xxx-wdt.txt | 25 --------- .../devicetree/bindings/watchdog/mpc8xxx-wdt.yaml | 64 ++++++++++++++++++++++ 2 files changed, 64 insertions(+), 25 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt deleted file mode 100644 index a384ff5b3ce8c62d813fc23d72f74e2158ff543e..0000000000000000000000000000000000000000 --- a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Freescale mpc8xxx watchdog driver (For 83xx, 86xx and 8xx) - -Required properties: -- compatible: Shall contain one of the following: - "mpc83xx_wdt" for an mpc83xx - "fsl,mpc8610-wdt" for an mpc86xx - "fsl,mpc823-wdt" for an mpc8xx -- reg: base physical address and length of the area hosting the - watchdog registers. - On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100> - On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100> - On the 8xx, "General System Interface Unit" area: <0x0 0x10> - -Optional properties: -- reg: additional physical address and length (4) of location of the - Reset Status Register (called RSTRSCR on the mpc86xx) - On the 83xx, it is located at offset 0x910 - On the 86xx, it is located at offset 0xe0094 - On the 8xx, it is located at offset 0x288 - -Example: - WDT: watchdog@0 { - compatible = "fsl,mpc823-wdt"; - reg = <0x0 0x10 0x288 0x4>; - }; diff --git a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml new file mode 100644 index 0000000000000000000000000000000000000000..c78a424388c6e30bc4656f5444e621c1b397366b --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/mpc8xxx-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale MPC8xxx watchdog timer (For 83xx, 86xx and 8xx) + +maintainers: + - J. Neuschäfer + +properties: + compatible: + enum: + - mpc83xx_wdt # for an mpc83xx + - fsl,mpc8610-wdt # for an mpc86xx + - fsl,mpc823-wdt # for an mpc8xx + + device_type: + const: watchdog + + reg: + minItems: 1 + items: + - description: | + Base physical address and length of the area hosting the watchdog + registers. + + On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100> + On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100> + On the 8xx, "General System Interface Unit" area: <0x0 0x10> + + - description: | + Additional optional physical address and length (4) of location of + the Reset Status Register (called RSTRSCR on the mpc86xx) + + On the 83xx, it is located at offset 0x910 + On the 86xx, it is located at offset 0xe0094 + On the 8xx, it is located at offset 0x288 + +required: + - compatible + - reg + +allOf: + - $ref: watchdog.yaml# + +additionalProperties: false + +examples: + - | + WDT: watchdog@0 { + compatible = "fsl,mpc823-wdt"; + reg = <0x0 0x10 0x288 0x4>; + }; + + - | + wdt: watchdog@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + +...