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[v3,1/4] dt-bindings: crypto: add ARTPEC crypto

Message ID b493a0eb939fe97f7e604c0c83916e0dac1d2bce.1501830919.git.larper@axis.com (mailing list archive)
State Superseded
Delegated to: Herbert Xu
Headers show

Commit Message

Lars Persson Aug. 4, 2017, 7:18 a.m. UTC 
Document the device tree bindings for the ARTPEC crypto accelerator on
ARTPEC-6 and ARTPEC-7 SoCs.

Signed-off-by: Lars Persson <larper@axis.com>
---
 .../devicetree/bindings/crypto/artpec6-crypto.txt        | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/crypto/artpec6-crypto.txt

Comments

Rob Herring (Arm) Aug. 9, 2017, 11:26 p.m. UTC | #1 
On Fri, Aug 04, 2017 at 09:18:45AM +0200, Lars Persson wrote:
> Document the device tree bindings for the ARTPEC crypto accelerator on
> ARTPEC-6 and ARTPEC-7 SoCs.
> 
> Signed-off-by: Lars Persson <larper@axis.com>
> ---
>  .../devicetree/bindings/crypto/artpec6-crypto.txt        | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/crypto/artpec6-crypto.txt

I acked v2. Please add acks when posting new versions.

Acked-by: Rob Herring <robh@kernel.org>
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Patch

diff --git a/Documentation/devicetree/bindings/crypto/artpec6-crypto.txt b/Documentation/devicetree/bindings/crypto/artpec6-crypto.txt
new file mode 100644
index 000000000000..d9cca4875bd6
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/artpec6-crypto.txt
@@ -0,0 +1,16 @@ 
+Axis crypto engine with PDMA interface.
+
+Required properties:
+- compatible : Should be one of the following strings:
+	"axis,artpec6-crypto" for the version in the Axis ARTPEC-6 SoC
+	"axis,artpec7-crypto" for the version in the Axis ARTPEC-7 SoC.
+- reg: Base address and size for the PDMA register area.
+- interrupts: Interrupt handle for the PDMA interrupt line.
+
+Example:
+
+crypto@f4264000 {
+	compatible = "axis,artpec6-crypto";
+	reg = <0xf4264000 0x1000>;
+	interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+};