@@ -61,7 +61,7 @@ static __init void da830_evm_init(void)
pr_warning("da830_evm_init: edma registration failed: %d\n",
ret);
- ret = da830_pinmux_setup(da830_i2c0_pins);
+ ret = da8xx_pinmux_setup(da830_i2c0_pins);
if (ret)
pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
ret);
@@ -75,7 +75,7 @@ static __init void da830_evm_init(void)
soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
soc_info->emac_pdata->rmii_en = 1;
- ret = da830_pinmux_setup(da830_cpgmac_pins);
+ ret = da8xx_pinmux_setup(da830_cpgmac_pins);
if (ret)
pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
ret);
@@ -27,14 +27,6 @@
#include "clock.h"
#include "mux.h"
-#define DA830_PSC0_BASE 0x01c10000
-#define DA830_PLL0_BASE 0x01c11000
-#define DA830_JTAG_ID_REG 0x01c14018
-#define DA830_TIMER64P0_BASE 0x01c20000
-#define DA830_TIMER64P1_BASE 0x01c21000
-#define DA830_GPIO_BASE 0x01e26000
-#define DA830_PSC1_BASE 0x01e27000
-
/* Offsets of the 8 compare registers on the da830 */
#define DA830_CMP12_0 0x60
#define DA830_CMP12_1 0x64
@@ -49,7 +41,7 @@
static struct pll_data pll0_data = {
.num = 1,
- .phys_base = DA830_PLL0_BASE,
+ .phys_base = DA8XX_PLL0_BASE,
.flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
};
@@ -436,27 +428,6 @@ static struct davinci_clk da830_clks[] = {
CLK(NULL, NULL, NULL),
};
-#define PINMUX0 0x00
-#define PINMUX1 0x04
-#define PINMUX2 0x08
-#define PINMUX3 0x0c
-#define PINMUX4 0x10
-#define PINMUX5 0x14
-#define PINMUX6 0x18
-#define PINMUX7 0x1c
-#define PINMUX8 0x20
-#define PINMUX9 0x24
-#define PINMUX10 0x28
-#define PINMUX11 0x2c
-#define PINMUX12 0x30
-#define PINMUX13 0x34
-#define PINMUX14 0x38
-#define PINMUX15 0x3c
-#define PINMUX16 0x40
-#define PINMUX17 0x44
-#define PINMUX18 0x48
-#define PINMUX19 0x4c
-
/*
* Device specific mux setup
*
@@ -1044,20 +1015,6 @@ const short da830_eqep1_pins[] __initdata = {
-1
};
-int da830_pinmux_setup(const short pins[])
-{
- int i, error = -EINVAL;
-
- if (pins)
- for (i = 0; pins[i] >= 0; i++) {
- error = davinci_cfg_reg(pins[i]);
- if (error)
- break;
- }
-
- return error;
-}
-
/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = {
[IRQ_DA8XX_COMMTX] = 7,
@@ -1174,8 +1131,8 @@ static struct map_desc da830_io_desc[] = {
};
static void __iomem *da830_psc_bases[] = {
- IO_ADDRESS(DA830_PSC0_BASE),
- IO_ADDRESS(DA830_PSC1_BASE),
+ IO_ADDRESS(DA8XX_PSC0_BASE),
+ IO_ADDRESS(DA8XX_PSC1_BASE),
};
/* Contents of JTAG ID register used to identify exact cpu type */
@@ -1191,14 +1148,14 @@ static struct davinci_id da830_ids[] = {
static struct davinci_timer_instance da830_timer_instance[2] = {
{
- .base = IO_ADDRESS(DA830_TIMER64P0_BASE),
+ .base = IO_ADDRESS(DA8XX_TIMER64P0_BASE),
.bottom_irq = IRQ_DA8XX_TINT12_0,
.top_irq = IRQ_DA8XX_TINT34_0,
.cmp_off = DA830_CMP12_0,
.cmp_irq = IRQ_DA830_T12CMPINT0_0,
},
{
- .base = IO_ADDRESS(DA830_TIMER64P1_BASE),
+ .base = IO_ADDRESS(DA8XX_TIMER64P1_BASE),
.bottom_irq = IRQ_DA8XX_TINT12_1,
.top_irq = IRQ_DA8XX_TINT34_1,
.cmp_off = DA830_CMP12_0,
@@ -1220,7 +1177,7 @@ static struct davinci_timer_info da830_timer_info = {
static struct davinci_soc_info davinci_soc_info_da830 = {
.io_desc = da830_io_desc,
.io_desc_num = ARRAY_SIZE(da830_io_desc),
- .jtag_id_base = IO_ADDRESS(DA830_JTAG_ID_REG),
+ .jtag_id_base = IO_ADDRESS(DA8XX_JTAG_ID_REG),
.ids = da830_ids,
.ids_num = ARRAY_SIZE(da830_ids),
.cpu_clks = da830_clks,
@@ -1234,7 +1191,7 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
.intc_irq_prios = da830_default_priorities,
.intc_irq_num = DA830_N_CP_INTC_IRQ,
.timer_info = &da830_timer_info,
- .gpio_base = IO_ADDRESS(DA830_GPIO_BASE),
+ .gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE),
.gpio_num = 128,
.gpio_irq = IRQ_DA8XX_GPIO0,
.serial_dev = &da8xx_serial_device,
@@ -29,6 +29,35 @@
#define DA8XX_BOOT_CFG_BASE (IO_PHYS + 0x14000)
+#define DA8XX_PSC0_BASE 0x01c10000
+#define DA8XX_PLL0_BASE 0x01c11000
+#define DA8XX_JTAG_ID_REG 0x01c14018
+#define DA8XX_TIMER64P0_BASE 0x01c20000
+#define DA8XX_TIMER64P1_BASE 0x01c21000
+#define DA8XX_GPIO_BASE 0x01e26000
+#define DA8XX_PSC1_BASE 0x01e27000
+
+#define PINMUX0 0x00
+#define PINMUX1 0x04
+#define PINMUX2 0x08
+#define PINMUX3 0x0c
+#define PINMUX4 0x10
+#define PINMUX5 0x14
+#define PINMUX6 0x18
+#define PINMUX7 0x1c
+#define PINMUX8 0x20
+#define PINMUX9 0x24
+#define PINMUX10 0x28
+#define PINMUX11 0x2c
+#define PINMUX12 0x30
+#define PINMUX13 0x34
+#define PINMUX14 0x38
+#define PINMUX15 0x3c
+#define PINMUX16 0x40
+#define PINMUX17 0x44
+#define PINMUX18 0x48
+#define PINMUX19 0x4c
+
void __init da830_init(void);
int da8xx_register_edma(void);
@@ -64,6 +93,6 @@ extern const short da830_ecap2_pins[];
extern const short da830_eqep0_pins[];
extern const short da830_eqep1_pins[];
-int da830_pinmux_setup(const short pins[]);
+int da8xx_pinmux_setup(const short pins[]);
#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
@@ -91,3 +91,17 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
return 0;
}
EXPORT_SYMBOL(davinci_cfg_reg);
+
+int da8xx_pinmux_setup(const short pins[])
+{
+ int i, error = -EINVAL;
+
+ if (pins)
+ for (i = 0; pins[i] >= 0; i++) {
+ error = davinci_cfg_reg(pins[i]);
+ if (error)
+ break;
+ }
+
+ return error;
+}
With the introduction of TI da850/omap-l138, some of the macros and functions defined for da830/omap-l137 will be needed in da850 source file. So, rearrange them so that they are not duplicated for da850/omap-l138. Also, modify the macro and function names from DA830/da830 to DA8XX/da8xx. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> --- This patch has been tested on DA830/OMAP-L137 EVM. Since the previous version, the PINMUX macros have also been moved to da8xx.h file and the da830_pinmux_setup function has been moved to mux.c file. arch/arm/mach-davinci/board-da830-evm.c | 4 +- arch/arm/mach-davinci/da830.c | 57 +++------------------------ arch/arm/mach-davinci/include/mach/da8xx.h | 31 ++++++++++++++- arch/arm/mach-davinci/mux.c | 14 +++++++ 4 files changed, 53 insertions(+), 53 deletions(-)