From patchwork Wed Jul 15 13:17:06 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: s-paulraj@ti.com X-Patchwork-Id: 35686 Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n6FDK7YA008439 for ; Wed, 15 Jul 2009 13:20:08 GMT Received: from dlep35.itg.ti.com ([157.170.170.118]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id n6FDIIks000523; Wed, 15 Jul 2009 08:18:23 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep35.itg.ti.com (8.13.7/8.13.7) with ESMTP id n6FDIIjX020592; Wed, 15 Jul 2009 08:18:18 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 875BA80637; Wed, 15 Jul 2009 08:17:51 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dlep36.itg.ti.com (dlep36.itg.ti.com [157.170.170.91]) by linux.omap.com (Postfix) with ESMTP id 47598806C4 for ; Wed, 15 Jul 2009 08:17:07 -0500 (CDT) Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep36.itg.ti.com (8.13.8/8.13.8) with ESMTP id n6FDH6Ap011838; Wed, 15 Jul 2009 08:17:06 -0500 (CDT) Received: from gt5d9d821.telogy.design.ti.com (gt5d9d821.telogy.design.ti.com [158.218.100.23]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id n6FDH6903170; Wed, 15 Jul 2009 08:17:06 -0500 (CDT) Received: from gt5d9d821.telogy.design.ti.com (localhost.localdomain [127.0.0.1]) by gt5d9d821.telogy.design.ti.com (8.13.1/8.13.1) with ESMTP id n6FDH6ZU005799; Wed, 15 Jul 2009 09:17:06 -0400 Received: (from a0866907@localhost) by gt5d9d821.telogy.design.ti.com (8.13.1/8.13.1/Submit) id n6FDH6RY005796; Wed, 15 Jul 2009 09:17:06 -0400 From: s-paulraj@ti.com To: davinci-linux-open-source@linux.davincidsp.com Date: Wed, 15 Jul 2009 09:17:06 -0400 Message-Id: <1247663826-5765-1-git-send-email-s-paulraj@ti.com> X-Mailer: git-send-email 1.6.0.4 Cc: Subject: [PATCH 2/5] Davinci: DM365: Adding support for SPI in DM365 SOC X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.4 Precedence: list List-Id: davinci-linux-open-source.linux.davincidsp.com List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com From: Sandeep Paulraj The patch adds support for SPI in DM365 SOC. A short explanation as to how to modify platform data if GPIOs are used as chip selects is also given Signed-off-by: Sandeep Paulraj --- arch/arm/mach-davinci/dm365.c | 65 ++++++++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/dm365.h | 3 + 2 files changed, 68 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index f02bce8..3090cb8 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -32,6 +33,7 @@ #include #include #include +#include #include "clock.h" #include "mux.h" @@ -597,6 +599,69 @@ INT_CFG(DM365, INT_EMAC_MISCPULSE, 17, 1, 1, false) #endif }; +static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32); + +/* + * The davinci_spi_platform_data can have a "chip_sel" array of GPIOs + * For example : + * static u8 dm365_spi0_chip_sel[] = {23, 45, 68}; + * This array should then become be a part of the platform data + * .chip_sel = dm365_spi0_chip_sel, + * Appropriately change the 'num_chipselect' in the structure below + */ + +static struct davinci_spi_platform_data dm365_spi0_pdata = { + .version = DAVINCI_SPI_VERSION_1, + .num_chipselect = 2, + .clk_internal = 1, + .cs_hold = 1, + .intr_level = 0, + .poll_mode = 1, + .c2tdelay = 8, + .t2cdelay = 8, +}; + +static struct resource dm365_spi0_resources[] = { + { + .start = 0x01c66000, + .end = 0x01c667ff, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_DM365_SPIINT0_0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device dm365_spi0_device = { + .name = "spi_davinci", + .id = 0, + .dev = { + .dma_mask = &dm365_spi0_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &dm365_spi0_pdata, + }, + .num_resources = ARRAY_SIZE(dm365_spi0_resources), + .resource = dm365_spi0_resources, +}; + +void __init dm365_init_spi0(unsigned chipselect_mask, + struct spi_board_info *info, unsigned len) +{ + davinci_cfg_reg(DM365_SPI0_SCLK); + davinci_cfg_reg(DM365_SPI0_SDI); + davinci_cfg_reg(DM365_SPI0_SDO); + + /* not all slaves will be wired up */ + if (chipselect_mask & BIT(0)) + davinci_cfg_reg(DM365_SPI0_SDENA0); + if (chipselect_mask & BIT(1)) + davinci_cfg_reg(DM365_SPI0_SDENA1); + + spi_register_board_info(info, len); + + platform_device_register(&dm365_spi0_device); +} static struct emac_platform_data dm365_emac_pdata = { .ctrl_reg_offset = DM365_EMAC_CNTRL_OFFSET, .ctrl_mod_reg_offset = DM365_EMAC_CNTRL_MOD_OFFSET, diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h index 09db434..61cfd30 100644 --- a/arch/arm/mach-davinci/include/mach/dm365.h +++ b/arch/arm/mach-davinci/include/mach/dm365.h @@ -25,5 +25,8 @@ #define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) void __init dm365_init(void); +struct spi_board_info; +void dm365_init_spi0(unsigned chipselect_mask, + struct spi_board_info *info, unsigned len); #endif /* __ASM_ARCH_DM365_H */