@@ -14,6 +14,7 @@
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
+#include <linux/spi/spi.h>
#include <asm/mach/map.h>
@@ -28,6 +29,7 @@
#include <mach/serial.h>
#include <mach/common.h>
#include <mach/asp.h>
+#include <mach/spi.h>
#include "clock.h"
#include "mux.h"
@@ -253,6 +255,12 @@ static struct clk emac_clk = {
.lpsc = DM646X_LPSC_EMAC,
};
+static struct clk spi0_clk = {
+ .name = "spi0",
+ .parent = &pll1_sysclk3,
+ .lpsc = DM646X_LPSC_SPI,
+};
+
static struct clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_sysclk3,
@@ -338,6 +346,7 @@ struct davinci_clk dm646x_clks[] = {
CLK(NULL, "mcasp1", &mcasp1_clk),
CLK(NULL, "aemif", &aemif_clk),
CLK("davinci_emac.1", NULL, &emac_clk),
+ CLK("spi_davinci.0", NULL, &spi0_clk),
CLK(NULL, "pwm0", &pwm0_clk),
CLK(NULL, "pwm1", &pwm1_clk),
CLK(NULL, "timer0", &timer0_clk),
@@ -349,6 +358,50 @@ struct davinci_clk dm646x_clks[] = {
CLK(NULL, NULL, NULL),
};
+static u64 dm646x_spi0_dma_mask = DMA_BIT_MASK(32);
+
+static struct davinci_spi_platform_data dm646x_spi0_pdata = {
+ .version = SPI_VERSION_1,
+ .num_chipselect = 2,
+ .clk_internal = 1,
+ .cs_hold = 1,
+ .intr_level = 0,
+ .poll_mode = 1,
+ .c2tdelay = 8,
+ .t2cdelay = 8,
+};
+
+static struct resource dm646x_spi0_resources[] = {
+ {
+ .start = 0x01c66800,
+ .end = 0x01c66fff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_DM646X_SPINT0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device dm646x_spi0_device = {
+ .name = "spi_davinci",
+ .id = 0,
+ .dev = {
+ .dma_mask = &dm646x_spi0_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &dm646x_spi0_pdata,
+ },
+ .num_resources = ARRAY_SIZE(dm646x_spi0_resources),
+ .resource = dm646x_spi0_resources,
+};
+
+void __init dm646x_init_spi0(struct spi_board_info *info, unsigned len)
+{
+ spi_register_board_info(info, len);
+
+ platform_device_register(&dm646x_spi0_device);
+}
+
static struct emac_platform_data dm646x_emac_pdata = {
.ctrl_reg_offset = DM646X_EMAC_CNTRL_OFFSET,
.ctrl_mod_reg_offset = DM646X_EMAC_CNTRL_MOD_OFFSET,
@@ -25,5 +25,7 @@
void __init dm646x_init(void);
void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
+struct spi_board_info;
+void dm646x_init_spi0(struct spi_board_info *info, unsigned len);
#endif /* __ASM_ARCH_DM646X_H */