From patchwork Fri Jul 17 22:12:17 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 36103 Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n6HMGb4P006302 for ; Fri, 17 Jul 2009 22:16:37 GMT Received: from dlep36.itg.ti.com ([157.170.170.91]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id n6HME7P5017456; Fri, 17 Jul 2009 17:14:12 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep36.itg.ti.com (8.13.8/8.13.8) with ESMTP id n6HME65R019980; Fri, 17 Jul 2009 17:14:06 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 82EC680626; Fri, 17 Jul 2009 17:14:06 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp51.itg.ti.com (dflp51.itg.ti.com [128.247.22.94]) by linux.omap.com (Postfix) with ESMTP id C4B6780699 for ; Fri, 17 Jul 2009 17:12:59 -0500 (CDT) Received: from neches.ext.ti.com (localhost [127.0.0.1]) by dflp51.itg.ti.com (8.13.7/8.13.7) with ESMTP id n6HMCxdR016459 for ; Fri, 17 Jul 2009 17:12:59 -0500 (CDT) Received: from mail198-dub-R.bigfish.com (mail-dub.bigfish.com [213.199.154.10]) by neches.ext.ti.com (8.13.7/8.13.7) with ESMTP id n6HMCr4Y010293 for ; Fri, 17 Jul 2009 17:12:59 -0500 Received: from mail198-dub (localhost.localdomain [127.0.0.1]) by mail198-dub-R.bigfish.com (Postfix) with ESMTP id 8B7E2130017F for ; Fri, 17 Jul 2009 22:12:53 +0000 (UTC) X-SpamScore: 0 X-BigFish: vps0(zzzz1202hzzz2dh62h) X-Spam-TCS-SCL: 1:0 X-MS-Exchange-Organization-Antispam-Report: OrigIP: 209.85.221.174; Service: EHS Received: by mail198-dub (MessageSwitch) id 1247868772995291_27932; Fri, 17 Jul 2009 22:12:52 +0000 (UCT) Received: from mail-qy0-f174.google.com (mail-qy0-f174.google.com [209.85.221.174]) by mail198-dub.bigfish.com (Postfix) with ESMTP id 85D8056804B for ; Fri, 17 Jul 2009 22:12:52 +0000 (UTC) Received: by qyk4 with SMTP id 4so945780qyk.4 for ; Fri, 17 Jul 2009 15:12:51 -0700 (PDT) Received: by 10.224.89.1 with SMTP id c1mr1140843qam.95.1247868771348; Fri, 17 Jul 2009 15:12:51 -0700 (PDT) Received: from localhost (deeprooted.net [216.254.16.51]) by mx.google.com with ESMTPS id 26sm2382684qwa.27.2009.07.17.15.12.50 (version=TLSv1/SSLv3 cipher=RC4-MD5); Fri, 17 Jul 2009 15:12:50 -0700 (PDT) From: Kevin Hilman To: linux-arm-kernel@lists.arm.linux.org.uk Date: Fri, 17 Jul 2009 15:12:17 -0700 Message-Id: <1247868758-10423-4-git-send-email-khilman@deeprootsystems.com> X-Mailer: git-send-email 1.6.3.3 In-Reply-To: <1247868758-10423-3-git-send-email-khilman@deeprootsystems.com> References: <1247868758-10423-1-git-send-email-khilman@deeprootsystems.com> <1247868758-10423-2-git-send-email-khilman@deeprootsystems.com> <1247868758-10423-3-git-send-email-khilman@deeprootsystems.com> Cc: davinci-linux-open-source@linux.davincidsp.com, Naresh Medisetty Subject: [PATCH 03/24] davinci: EDMA: add support for dm646x X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.4 Precedence: list List-Id: davinci-linux-open-source.linux.davincidsp.com List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com From: Sudhakar Rajashekhara Enables module clock for DM646x EDMA channel controller and transfer controller. Signed-off-by: Naresh Medisetty Signed-off-by: Sudhakar Rajashekhara Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm646x.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 files changed, 40 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index e241073..19e989d 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -162,6 +162,41 @@ static struct clk arm_clk = { .flags = ALWAYS_ENABLED, }; +static struct clk edma_cc_clk = { + .name = "edma_cc", + .parent = &pll1_sysclk2, + .lpsc = DM646X_LPSC_TPCC, + .flags = ALWAYS_ENABLED, +}; + +static struct clk edma_tc0_clk = { + .name = "edma_tc0", + .parent = &pll1_sysclk2, + .lpsc = DM646X_LPSC_TPTC0, + .flags = ALWAYS_ENABLED, +}; + +static struct clk edma_tc1_clk = { + .name = "edma_tc1", + .parent = &pll1_sysclk2, + .lpsc = DM646X_LPSC_TPTC1, + .flags = ALWAYS_ENABLED, +}; + +static struct clk edma_tc2_clk = { + .name = "edma_tc2", + .parent = &pll1_sysclk2, + .lpsc = DM646X_LPSC_TPTC2, + .flags = ALWAYS_ENABLED, +}; + +static struct clk edma_tc3_clk = { + .name = "edma_tc3", + .parent = &pll1_sysclk2, + .lpsc = DM646X_LPSC_TPTC3, + .flags = ALWAYS_ENABLED, +}; + static struct clk uart0_clk = { .name = "uart0", .parent = &aux_clkin, @@ -269,6 +304,11 @@ struct davinci_clk dm646x_clks[] = { CLK(NULL, "pll2_sysclk1", &pll2_sysclk1), CLK(NULL, "dsp", &dsp_clk), CLK(NULL, "arm", &arm_clk), + CLK(NULL, "edma_cc", &edma_cc_clk), + CLK(NULL, "edma_tc0", &edma_tc0_clk), + CLK(NULL, "edma_tc1", &edma_tc1_clk), + CLK(NULL, "edma_tc2", &edma_tc2_clk), + CLK(NULL, "edma_tc3", &edma_tc3_clk), CLK(NULL, "uart0", &uart0_clk), CLK(NULL, "uart1", &uart1_clk), CLK(NULL, "uart2", &uart2_clk),