From patchwork Wed Aug 12 21:54:40 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rajashekhara, Sudhakar" X-Patchwork-Id: 40869 Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n7CCRsG6014103 for ; Wed, 12 Aug 2009 12:27:54 GMT Received: from dlep35.itg.ti.com ([157.170.170.118]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id n7CCPuEZ032388; Wed, 12 Aug 2009 07:26:01 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep35.itg.ti.com (8.13.7/8.13.7) with ESMTP id n7CCPtnF028362; Wed, 12 Aug 2009 07:25:55 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 9B29C80627; Wed, 12 Aug 2009 07:25:55 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp53.itg.ti.com (dflp53.itg.ti.com [128.247.5.6]) by linux.omap.com (Postfix) with ESMTP id 64C6080626 for ; Wed, 12 Aug 2009 07:25:54 -0500 (CDT) Received: from tidmzi-ftp.india.ext.ti.com (localhost [127.0.0.1]) by dflp53.itg.ti.com (8.13.8/8.13.8) with SMTP id n7CCPq2v027930 for ; Wed, 12 Aug 2009 07:25:53 -0500 (CDT) Received: from symphonyindia.ti.com (symphony-ftp [192.168.247.11]) by tidmzi-ftp.india.ext.ti.com (Postfix) with SMTP id C25703886B for ; Wed, 12 Aug 2009 17:52:59 +0530 (IST) Received: from localhost.localdomain ([192.168.247.76]) by symphonyindia.ti.com (8.13.1/8.12.10) with ESMTP id n7CCKZEd002529; Wed, 12 Aug 2009 17:50:35 +0530 From: Sudhakar Rajashekhara To: davinci-linux-open-source@linux.davincidsp.com Date: Wed, 12 Aug 2009 17:54:40 -0400 Message-Id: <1250114080-9295-1-git-send-email-sudhakar.raj@ti.com> X-Mailer: git-send-email 1.5.6 Cc: Subject: [PATCH v2] davinci: Add NAND flash support for DA850/OMAP-L138 X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.4 Precedence: list List-Id: davinci-linux-open-source.linux.davincidsp.com List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com This patch adds platform data for the 512MB NAND Flash found on DA850/OMAP-L138 EVM. Currently it supports only 1-bit ECC. Signed-off-by: Sudhakar Rajashekhara --- No changes from the previous version, except that the patch has been modified to apply on master branch. This patch depends on the following patches which I have submitted to davinci git: [PATCH v2] davinci: Configure MDIO pins for EMAC [PATCH v2] davinci: Add platform support for da850/omap-l138 GLCD [PATCH v2] davinci: Add MMC/SD support for da850/omap-l138 arch/arm/mach-davinci/board-da850-evm.c | 91 ++++++++++++++++++++++++++++ arch/arm/mach-davinci/da850.c | 31 ++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 3 + arch/arm/mach-davinci/include/mach/mux.h | 16 +++++ 4 files changed, 141 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 97251c3..c42795a 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -19,6 +19,10 @@ #include #include #include +#include +#include +#include +#include #include #include @@ -28,6 +32,7 @@ #include #include #include +#include #define DA850_EVM_PHY_MASK 0x1 #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ @@ -42,6 +47,76 @@ /* GPIO 4[1] is used for MMC/SD WP - 16 * 4 + 1 = 65 */ #define DA850_MMCSD_WP_PIN 65 +#if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) +/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash + * (128K blocks). It may be used instead of the (default) SPI flash + * to boot, using TI's tools to install the secondary boot loader + * (UBL) and U-Boot. + */ +struct mtd_partition da850_evm_nandflash_partition[] = { + { + .name = "u-boot env", + .offset = 0, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "UBL", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "u-boot", + .offset = MTDPART_OFS_APPEND, + .size = 4 * SZ_128K, + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "kernel", + .offset = 0x200000, + .size = SZ_2M, + .mask_flags = 0, + }, + { + .name = "filesystem", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0, + }, +}; + +static struct davinci_nand_pdata da850_evm_nandflash_data = { + .parts = da850_evm_nandflash_partition, + .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), + .ecc_mode = NAND_ECC_HW, + .options = NAND_USE_FLASH_BBT, +}; + +static struct resource da850_evm_nandflash_resource[] = { + { + .start = DA8XX_AEMIF_CS3_BASE, + .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_evm_nandflash_device = { + .name = "davinci_nand", + .id = 1, + .dev = { + .platform_data = &da850_evm_nandflash_data, + }, + .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), + .resource = da850_evm_nandflash_resource, +}; +#endif + static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { .bus_freq = 100, /* kHz */ .bus_delay = 0, /* usec */ @@ -51,6 +126,12 @@ static struct davinci_uart_config da850_evm_uart_config __initdata = { .enabled_uarts = 0x7, }; +static struct platform_device *da850_evm_devices[] __initdata = { +#if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) + &da850_evm_nandflash_device, +#endif +}; + #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) static int da850_evm_mmc_get_ro(int index) { @@ -116,6 +197,16 @@ static __init void da850_evm_init(void) struct davinci_soc_info *soc_info = &davinci_soc_info; int ret; +#if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) + ret = da8xx_pinmux_setup(da850_nand_pins); + if (ret) + pr_warning("da850_evm_init: nand mux setup failed: %d\n", + ret); +#endif + + platform_add_devices(da850_evm_devices, + ARRAY_SIZE(da850_evm_devices)); + ret = da8xx_register_edma(); if (ret) pr_warning("da850_evm_init: edma registration failed: %d\n", diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 62e0f2f..4923f13 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -303,6 +303,13 @@ static struct clk mmcsd_clk = { .lpsc = DA8XX_LPSC0_MMC_SD, }; +static struct clk aemif_clk = { + .name = "aemif", + .parent = &pll0_sysclk3, + .lpsc = DA8XX_LPSC0_EMIF25, + .flags = ALWAYS_ENABLED, +}; + static struct davinci_clk da850_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), @@ -342,6 +349,7 @@ static struct davinci_clk da850_clks[] = { CLK("davinci_emac.1", NULL, &emac_clk), CLK("da8xx_lcdc.0", NULL, &lcdc_clk), CLK("davinci_mmc.0", NULL, &mmcsd_clk), + CLK(NULL, "aemif", &aemif_clk), CLK(NULL, NULL, NULL), }; @@ -416,6 +424,21 @@ static const struct mux_config da850_pins[] = { MUX_CFG(DA850, MMCSD0_DAT_3, 10, 20, 15, 2, false) MUX_CFG(DA850, MMCSD0_CLK, 10, 0, 15, 2, false) MUX_CFG(DA850, MMCSD0_CMD, 10, 4, 15, 2, false) + /* EMIF2.5/EMIFA function */ + MUX_CFG(DA850, EMA_D_7, 9, 0, 15, 1, false) + MUX_CFG(DA850, EMA_D_6, 9, 4, 15, 1, false) + MUX_CFG(DA850, EMA_D_5, 9, 8, 15, 1, false) + MUX_CFG(DA850, EMA_D_4, 9, 12, 15, 1, false) + MUX_CFG(DA850, EMA_D_3, 9, 16, 15, 1, false) + MUX_CFG(DA850, EMA_D_2, 9, 20, 15, 1, false) + MUX_CFG(DA850, EMA_D_1, 9, 24, 15, 1, false) + MUX_CFG(DA850, EMA_D_0, 9, 28, 15, 1, false) + MUX_CFG(DA850, EMA_A_1, 12, 24, 15, 1, false) + MUX_CFG(DA850, EMA_A_2, 12, 20, 15, 1, false) + MUX_CFG(DA850, NEMA_CS_3, 7, 4, 15, 1, false) + MUX_CFG(DA850, NEMA_CS_4, 7, 8, 15, 1, false) + MUX_CFG(DA850, NEMA_WE, 7, 16, 15, 1, false) + MUX_CFG(DA850, NEMA_OE, 7, 20, 15, 1, false) /* GPIO function */ MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) MUX_CFG(DA850, GPIO8_10, 18, 28, 15, 8, false) @@ -475,6 +498,14 @@ const short da850_mmcsd0_pins[] __initdata = { -1 }; +const short da850_nand_pins[] __initdata = { + DA850_EMA_D_7, DA850_EMA_D_6, DA850_EMA_D_5, DA850_EMA_D_4, + DA850_EMA_D_3, DA850_EMA_D_2, DA850_EMA_D_1, DA850_EMA_D_0, + DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4, + DA850_NEMA_WE, DA850_NEMA_OE, + -1 +}; + /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { [IRQ_DA8XX_COMMTX] = 7, diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 743ad8b..71261db 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -39,6 +39,8 @@ #define DA8XX_PSC1_BASE 0x01e27000 #define DA8XX_LCD_CNTRL_BASE 0x01e13000 #define DA8XX_MMCSD0_BASE 0x01c40000 +#define DA8XX_AEMIF_CS3_BASE 0x62000000 +#define DA8XX_AEMIF_CTL_BASE 0x68000000 #define PINMUX0 0x00 #define PINMUX1 0x04 @@ -107,6 +109,7 @@ extern const short da850_i2c1_pins[]; extern const short da850_cpgmac_pins[]; extern const short da850_lcdcntl_pins[]; extern const short da850_mmcsd0_pins[]; +extern const short da850_nand_pins[]; int da8xx_pinmux_setup(const short pins[]); diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index f5d4052..a8fcc2a 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h @@ -781,6 +781,22 @@ enum davinci_da850_index { DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, + /* EMIF2.5/EMIFA function */ + DA850_EMA_D_7, + DA850_EMA_D_6, + DA850_EMA_D_5, + DA850_EMA_D_4, + DA850_EMA_D_3, + DA850_EMA_D_2, + DA850_EMA_D_1, + DA850_EMA_D_0, + DA850_EMA_A_1, + DA850_EMA_A_2, + DA850_NEMA_CS_3, + DA850_NEMA_CS_4, + DA850_NEMA_WE, + DA850_NEMA_OE, + /* GPIO function */ DA850_GPIO2_15, DA850_GPIO8_10,