| Message ID | 1250114089-9318-1-git-send-email-sudhakar.raj@ti.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
Sudhakar Rajashekhara <sudhakar.raj@ti.com> writes: > This patch adds platform data for the 8MB NOR flash > found on da850/omap-l138 EVM. Both NOR and NAND can > co-exist on da850/omap-l138 as they are using different > chip selects. > > Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> > --- > Since the previous version, EMA_BA_0 pin has been removed > from the mux table as this pin is not being used on > DA850/OMAP-L138 EVM for NOR. > > This patch depends on the following patches which I have > submitted to davinci git: > [PATCH v2] davinci: Configure MDIO pins for EMAC > [PATCH v2] davinci: Add platform support for da850/omap-l138 GLCD > [PATCH v2] davinci: Add MMC/SD support for da850/omap-l138 > [PATCH v2] davinci: Add NAND flash support for DA850/OMAP-L138 Would it be possible to do all these additions without the #ifdefs in the board file like you did for GLCD. IOW, just create/register all of them. The platform_device will be created and potentially waste some memory if the corresponding platform_driver is never created, but it makes things a bit more flexible. Are there acutally mux conflicts between some of these devices? If so, until we get some better support for dynamic mux, I think it would more clear to have this documented (maybe with warnings) in the board file so users don't have to experiment with Kconfig options to find a working config. > arch/arm/mach-davinci/board-da850-evm.c | 60 ++++++++++++++++++++++++++++ > arch/arm/mach-davinci/da850.c | 50 +++++++++++++++++++++++ > arch/arm/mach-davinci/include/mach/da8xx.h | 2 + > arch/arm/mach-davinci/include/mach/mux.h | 34 ++++++++++++++++ > 4 files changed, 146 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c > index b879cc5..6087458 100644 > --- a/arch/arm/mach-davinci/board-da850-evm.c > +++ b/arch/arm/mach-davinci/board-da850-evm.c > @@ -23,6 +23,7 @@ > #include <linux/mtd/mtd.h> > #include <linux/mtd/nand.h> > #include <linux/mtd/partitions.h> > +#include <linux/mtd/physmap.h> > > #include <asm/mach-types.h> > #include <asm/mach/arch.h> > @@ -47,6 +48,41 @@ > /* GPIO 4[1] is used for MMC/SD WP - 16 * 4 + 1 = 65 */ > #define DA850_MMCSD_WP_PIN 65 > > +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) > +static struct mtd_partition da850_evm_norflash_partition[] = { > + { > + .name = "NOR filesystem", > + .offset = 0, > + .size = MTDPART_SIZ_FULL, > + .mask_flags = 0, > + }, > +}; > + > +static struct physmap_flash_data da850_evm_norflash_data = { > + .width = 2, > + .parts = da850_evm_norflash_partition, > + .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition), > +}; > + > +static struct resource da850_evm_norflash_resource[] = { > + { > + .start = DA8XX_AEMIF_CS2_BASE, > + .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1, > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static struct platform_device da850_evm_norflash_device = { > + .name = "physmap-flash", > + .id = 0, > + .dev = { > + .platform_data = &da850_evm_norflash_data, > + }, > + .num_resources = 1, > + .resource = da850_evm_norflash_resource, > +}; > +#endif > + > #if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) > /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash > * (128K blocks). It may be used instead of the (default) SPI flash > @@ -130,6 +166,9 @@ static struct platform_device *da850_evm_devices[] __initdata = { > #if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) > &da850_evm_nandflash_device, > #endif > +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) > + &da850_evm_norflash_device, > +#endif > }; > > #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) > @@ -192,6 +231,18 @@ static int da850_lcd_hw_init(void) > return 0; > } > > +static void __init da850_evm_init_nor(void) > +{ > + void __iomem *aemif_addr; > + > + aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K - 1); Why the -1 here? > + /* Configure data bus width of CS2 to 16 bit */ > + __raw_writel(1, aemif_addr + 0x10); Just use writel(), and also some symobilc names would help readability instead of using hard-coded constants. > + iounmap(aemif_addr); > +} > + > static __init void da850_evm_init(void) > { > struct davinci_soc_info *soc_info = &davinci_soc_info; > @@ -204,6 +255,15 @@ static __init void da850_evm_init(void) > ret); > #endif > > +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) > + ret = da8xx_pinmux_setup(da850_nor_pins); > + if (ret) > + pr_warning("da850_evm_init: nor mux setup failed: %d\n", > + ret); > + > + da850_evm_init_nor(); > +#endif > + > platform_add_devices(da850_evm_devices, > ARRAY_SIZE(da850_evm_devices)); > > diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c > index 4923f13..2b59e93 100644 > --- a/arch/arm/mach-davinci/da850.c > +++ b/arch/arm/mach-davinci/da850.c > @@ -439,6 +439,40 @@ static const struct mux_config da850_pins[] = { > MUX_CFG(DA850, NEMA_CS_4, 7, 8, 15, 1, false) > MUX_CFG(DA850, NEMA_WE, 7, 16, 15, 1, false) > MUX_CFG(DA850, NEMA_OE, 7, 20, 15, 1, false) > + MUX_CFG(DA850, EMA_A_0, 12, 28, 15, 1, false) > + MUX_CFG(DA850, EMA_A_3, 12, 16, 15, 1, false) > + MUX_CFG(DA850, EMA_A_4, 12, 12, 15, 1, false) > + MUX_CFG(DA850, EMA_A_5, 12, 8, 15, 1, false) > + MUX_CFG(DA850, EMA_A_6, 12, 4, 15, 1, false) > + MUX_CFG(DA850, EMA_A_7, 12, 0, 15, 1, false) > + MUX_CFG(DA850, EMA_A_8, 11, 28, 15, 1, false) > + MUX_CFG(DA850, EMA_A_9, 11, 24, 15, 1, false) > + MUX_CFG(DA850, EMA_A_10, 11, 20, 15, 1, false) > + MUX_CFG(DA850, EMA_A_11, 11, 16, 15, 1, false) > + MUX_CFG(DA850, EMA_A_12, 11, 12, 15, 1, false) > + MUX_CFG(DA850, EMA_A_13, 11, 8, 15, 1, false) > + MUX_CFG(DA850, EMA_A_14, 11, 4, 15, 1, false) > + MUX_CFG(DA850, EMA_A_15, 11, 0, 15, 1, false) > + MUX_CFG(DA850, EMA_A_16, 10, 28, 15, 1, false) > + MUX_CFG(DA850, EMA_A_17, 10, 24, 15, 1, false) > + MUX_CFG(DA850, EMA_A_18, 10, 20, 15, 1, false) > + MUX_CFG(DA850, EMA_A_19, 10, 16, 15, 1, false) > + MUX_CFG(DA850, EMA_A_20, 10, 12, 15, 1, false) > + MUX_CFG(DA850, EMA_A_21, 10, 8, 15, 1, false) > + MUX_CFG(DA850, EMA_A_22, 10, 4, 15, 1, false) > + MUX_CFG(DA850, EMA_A_23, 10, 0, 15, 1, false) > + MUX_CFG(DA850, EMA_D_8, 8, 28, 15, 1, false) > + MUX_CFG(DA850, EMA_D_9, 8, 24, 15, 1, false) > + MUX_CFG(DA850, EMA_D_10, 8, 20, 15, 1, false) > + MUX_CFG(DA850, EMA_D_11, 8, 16, 15, 1, false) > + MUX_CFG(DA850, EMA_D_12, 8, 12, 15, 1, false) > + MUX_CFG(DA850, EMA_D_13, 8, 8, 15, 1, false) > + MUX_CFG(DA850, EMA_D_14, 8, 4, 15, 1, false) > + MUX_CFG(DA850, EMA_D_15, 8, 0, 15, 1, false) > + MUX_CFG(DA850, EMA_BA_1, 5, 24, 15, 1, false) > + MUX_CFG(DA850, EMA_CLK, 6, 0, 15, 1, false) > + MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false) > + MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false) > /* GPIO function */ > MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) > MUX_CFG(DA850, GPIO8_10, 18, 28, 15, 8, false) > @@ -506,6 +540,22 @@ const short da850_nand_pins[] __initdata = { > -1 > }; > > +const short da850_nor_pins[] __initdata = { > + DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, > + DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1, > + DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5, > + DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9, > + DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13, > + DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1, > + DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5, > + DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9, > + DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13, > + DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17, > + DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21, > + DA850_EMA_A_22, DA850_EMA_A_23, > + -1 > +}; > + > /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ > static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { > [IRQ_DA8XX_COMMTX] = 7, > diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h > index 71261db..b117d77 100644 > --- a/arch/arm/mach-davinci/include/mach/da8xx.h > +++ b/arch/arm/mach-davinci/include/mach/da8xx.h > @@ -39,6 +39,7 @@ > #define DA8XX_PSC1_BASE 0x01e27000 > #define DA8XX_LCD_CNTRL_BASE 0x01e13000 > #define DA8XX_MMCSD0_BASE 0x01c40000 > +#define DA8XX_AEMIF_CS2_BASE 0x60000000 > #define DA8XX_AEMIF_CS3_BASE 0x62000000 > #define DA8XX_AEMIF_CTL_BASE 0x68000000 > > @@ -110,6 +111,7 @@ extern const short da850_cpgmac_pins[]; > extern const short da850_lcdcntl_pins[]; > extern const short da850_mmcsd0_pins[]; > extern const short da850_nand_pins[]; > +extern const short da850_nor_pins[]; > > int da8xx_pinmux_setup(const short pins[]); > > diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h > index a8fcc2a..2113141 100644 > --- a/arch/arm/mach-davinci/include/mach/mux.h > +++ b/arch/arm/mach-davinci/include/mach/mux.h > @@ -796,6 +796,40 @@ enum davinci_da850_index { > DA850_NEMA_CS_4, > DA850_NEMA_WE, > DA850_NEMA_OE, > + DA850_EMA_D_15, > + DA850_EMA_D_14, > + DA850_EMA_D_13, > + DA850_EMA_D_12, > + DA850_EMA_D_11, > + DA850_EMA_D_10, > + DA850_EMA_D_9, > + DA850_EMA_D_8, > + DA850_EMA_A_0, > + DA850_EMA_A_3, > + DA850_EMA_A_4, > + DA850_EMA_A_5, > + DA850_EMA_A_6, > + DA850_EMA_A_7, > + DA850_EMA_A_8, > + DA850_EMA_A_9, > + DA850_EMA_A_10, > + DA850_EMA_A_11, > + DA850_EMA_A_12, > + DA850_EMA_A_13, > + DA850_EMA_A_14, > + DA850_EMA_A_15, > + DA850_EMA_A_16, > + DA850_EMA_A_17, > + DA850_EMA_A_18, > + DA850_EMA_A_19, > + DA850_EMA_A_20, > + DA850_EMA_A_21, > + DA850_EMA_A_22, > + DA850_EMA_A_23, > + DA850_EMA_BA_1, > + DA850_EMA_CLK, > + DA850_EMA_WAIT_1, > + DA850_NEMA_CS_2, > > /* GPIO function */ > DA850_GPIO2_15, > -- > 1.5.6 > > _______________________________________________ > Davinci-linux-open-source mailing list > Davinci-linux-open-source@linux.davincidsp.com > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
On Wed, Aug 12, 2009 at 23:37:54, Kevin Hilman wrote: > Sudhakar Rajashekhara <sudhakar.raj@ti.com> writes: > > > This patch adds platform data for the 8MB NOR flash > > found on da850/omap-l138 EVM. Both NOR and NAND can > > co-exist on da850/omap-l138 as they are using different > > chip selects. > > > > Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> > > --- > > Since the previous version, EMA_BA_0 pin has been removed > > from the mux table as this pin is not being used on > > DA850/OMAP-L138 EVM for NOR. > > > > This patch depends on the following patches which I have > > submitted to davinci git: > > [PATCH v2] davinci: Configure MDIO pins for EMAC > > [PATCH v2] davinci: Add platform support for da850/omap-l138 GLCD > > [PATCH v2] davinci: Add MMC/SD support for da850/omap-l138 > > [PATCH v2] davinci: Add NAND flash support for DA850/OMAP-L138 > > Would it be possible to do all these additions without the #ifdefs in > the board file like you did for GLCD. > > IOW, just create/register all of them. The platform_device will be > created and potentially waste some memory if the corresponding > platform_driver is never created, but it makes things a bit more > flexible. > Sure. I'll change it. > Are there acutally mux conflicts between some of these devices? > > If so, until we get some better support for dynamic mux, I think it > would more clear to have this documented (maybe with warnings) in the board > file so users don't have to experiment with Kconfig options to find > a working config. > I was planning to submit a patch to handle this right after this patch. Few pins of NOR and MMC are shared on da850/omap-l138. I'll be printing out a warning if both NOR and MMC are enabled in menuconfig. I'll leave the choice of choosing between NOR and MMC to the user. > > arch/arm/mach-davinci/board-da850-evm.c | 60 ++++++++++++++++++++++++++++ > > arch/arm/mach-davinci/da850.c | 50 +++++++++++++++++++++++ > > arch/arm/mach-davinci/include/mach/da8xx.h | 2 + > > arch/arm/mach-davinci/include/mach/mux.h | 34 ++++++++++++++++ > > 4 files changed, 146 insertions(+), 0 deletions(-) > > > > diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c > > index b879cc5..6087458 100644 > > --- a/arch/arm/mach-davinci/board-da850-evm.c > > +++ b/arch/arm/mach-davinci/board-da850-evm.c [...] > > > > +static void __init da850_evm_init_nor(void) > > +{ > > + void __iomem *aemif_addr; > > + > > + aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K - 1); > > Why the -1 here? > My mistake. Will remove -1. > > + /* Configure data bus width of CS2 to 16 bit */ > > + __raw_writel(1, aemif_addr + 0x10); > > Just use writel(), and also some symobilc names would help readability > instead of using hard-coded constants. > OK. - Sudhakar
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index b879cc5..6087458 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -23,6 +23,7 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -47,6 +48,41 @@ /* GPIO 4[1] is used for MMC/SD WP - 16 * 4 + 1 = 65 */ #define DA850_MMCSD_WP_PIN 65 +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) +static struct mtd_partition da850_evm_norflash_partition[] = { + { + .name = "NOR filesystem", + .offset = 0, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0, + }, +}; + +static struct physmap_flash_data da850_evm_norflash_data = { + .width = 2, + .parts = da850_evm_norflash_partition, + .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition), +}; + +static struct resource da850_evm_norflash_resource[] = { + { + .start = DA8XX_AEMIF_CS2_BASE, + .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_evm_norflash_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &da850_evm_norflash_data, + }, + .num_resources = 1, + .resource = da850_evm_norflash_resource, +}; +#endif + #if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash * (128K blocks). It may be used instead of the (default) SPI flash @@ -130,6 +166,9 @@ static struct platform_device *da850_evm_devices[] __initdata = { #if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) &da850_evm_nandflash_device, #endif +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) + &da850_evm_norflash_device, +#endif }; #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) @@ -192,6 +231,18 @@ static int da850_lcd_hw_init(void) return 0; } +static void __init da850_evm_init_nor(void) +{ + void __iomem *aemif_addr; + + aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K - 1); + + /* Configure data bus width of CS2 to 16 bit */ + __raw_writel(1, aemif_addr + 0x10); + + iounmap(aemif_addr); +} + static __init void da850_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; @@ -204,6 +255,15 @@ static __init void da850_evm_init(void) ret); #endif +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) + ret = da8xx_pinmux_setup(da850_nor_pins); + if (ret) + pr_warning("da850_evm_init: nor mux setup failed: %d\n", + ret); + + da850_evm_init_nor(); +#endif + platform_add_devices(da850_evm_devices, ARRAY_SIZE(da850_evm_devices)); diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 4923f13..2b59e93 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -439,6 +439,40 @@ static const struct mux_config da850_pins[] = { MUX_CFG(DA850, NEMA_CS_4, 7, 8, 15, 1, false) MUX_CFG(DA850, NEMA_WE, 7, 16, 15, 1, false) MUX_CFG(DA850, NEMA_OE, 7, 20, 15, 1, false) + MUX_CFG(DA850, EMA_A_0, 12, 28, 15, 1, false) + MUX_CFG(DA850, EMA_A_3, 12, 16, 15, 1, false) + MUX_CFG(DA850, EMA_A_4, 12, 12, 15, 1, false) + MUX_CFG(DA850, EMA_A_5, 12, 8, 15, 1, false) + MUX_CFG(DA850, EMA_A_6, 12, 4, 15, 1, false) + MUX_CFG(DA850, EMA_A_7, 12, 0, 15, 1, false) + MUX_CFG(DA850, EMA_A_8, 11, 28, 15, 1, false) + MUX_CFG(DA850, EMA_A_9, 11, 24, 15, 1, false) + MUX_CFG(DA850, EMA_A_10, 11, 20, 15, 1, false) + MUX_CFG(DA850, EMA_A_11, 11, 16, 15, 1, false) + MUX_CFG(DA850, EMA_A_12, 11, 12, 15, 1, false) + MUX_CFG(DA850, EMA_A_13, 11, 8, 15, 1, false) + MUX_CFG(DA850, EMA_A_14, 11, 4, 15, 1, false) + MUX_CFG(DA850, EMA_A_15, 11, 0, 15, 1, false) + MUX_CFG(DA850, EMA_A_16, 10, 28, 15, 1, false) + MUX_CFG(DA850, EMA_A_17, 10, 24, 15, 1, false) + MUX_CFG(DA850, EMA_A_18, 10, 20, 15, 1, false) + MUX_CFG(DA850, EMA_A_19, 10, 16, 15, 1, false) + MUX_CFG(DA850, EMA_A_20, 10, 12, 15, 1, false) + MUX_CFG(DA850, EMA_A_21, 10, 8, 15, 1, false) + MUX_CFG(DA850, EMA_A_22, 10, 4, 15, 1, false) + MUX_CFG(DA850, EMA_A_23, 10, 0, 15, 1, false) + MUX_CFG(DA850, EMA_D_8, 8, 28, 15, 1, false) + MUX_CFG(DA850, EMA_D_9, 8, 24, 15, 1, false) + MUX_CFG(DA850, EMA_D_10, 8, 20, 15, 1, false) + MUX_CFG(DA850, EMA_D_11, 8, 16, 15, 1, false) + MUX_CFG(DA850, EMA_D_12, 8, 12, 15, 1, false) + MUX_CFG(DA850, EMA_D_13, 8, 8, 15, 1, false) + MUX_CFG(DA850, EMA_D_14, 8, 4, 15, 1, false) + MUX_CFG(DA850, EMA_D_15, 8, 0, 15, 1, false) + MUX_CFG(DA850, EMA_BA_1, 5, 24, 15, 1, false) + MUX_CFG(DA850, EMA_CLK, 6, 0, 15, 1, false) + MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false) + MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false) /* GPIO function */ MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) MUX_CFG(DA850, GPIO8_10, 18, 28, 15, 8, false) @@ -506,6 +540,22 @@ const short da850_nand_pins[] __initdata = { -1 }; +const short da850_nor_pins[] __initdata = { + DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, + DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1, + DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5, + DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9, + DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13, + DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1, + DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5, + DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9, + DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13, + DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17, + DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21, + DA850_EMA_A_22, DA850_EMA_A_23, + -1 +}; + /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { [IRQ_DA8XX_COMMTX] = 7, diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 71261db..b117d77 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -39,6 +39,7 @@ #define DA8XX_PSC1_BASE 0x01e27000 #define DA8XX_LCD_CNTRL_BASE 0x01e13000 #define DA8XX_MMCSD0_BASE 0x01c40000 +#define DA8XX_AEMIF_CS2_BASE 0x60000000 #define DA8XX_AEMIF_CS3_BASE 0x62000000 #define DA8XX_AEMIF_CTL_BASE 0x68000000 @@ -110,6 +111,7 @@ extern const short da850_cpgmac_pins[]; extern const short da850_lcdcntl_pins[]; extern const short da850_mmcsd0_pins[]; extern const short da850_nand_pins[]; +extern const short da850_nor_pins[]; int da8xx_pinmux_setup(const short pins[]); diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index a8fcc2a..2113141 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h @@ -796,6 +796,40 @@ enum davinci_da850_index { DA850_NEMA_CS_4, DA850_NEMA_WE, DA850_NEMA_OE, + DA850_EMA_D_15, + DA850_EMA_D_14, + DA850_EMA_D_13, + DA850_EMA_D_12, + DA850_EMA_D_11, + DA850_EMA_D_10, + DA850_EMA_D_9, + DA850_EMA_D_8, + DA850_EMA_A_0, + DA850_EMA_A_3, + DA850_EMA_A_4, + DA850_EMA_A_5, + DA850_EMA_A_6, + DA850_EMA_A_7, + DA850_EMA_A_8, + DA850_EMA_A_9, + DA850_EMA_A_10, + DA850_EMA_A_11, + DA850_EMA_A_12, + DA850_EMA_A_13, + DA850_EMA_A_14, + DA850_EMA_A_15, + DA850_EMA_A_16, + DA850_EMA_A_17, + DA850_EMA_A_18, + DA850_EMA_A_19, + DA850_EMA_A_20, + DA850_EMA_A_21, + DA850_EMA_A_22, + DA850_EMA_A_23, + DA850_EMA_BA_1, + DA850_EMA_CLK, + DA850_EMA_WAIT_1, + DA850_NEMA_CS_2, /* GPIO function */ DA850_GPIO2_15,
This patch adds platform data for the 8MB NOR flash found on da850/omap-l138 EVM. Both NOR and NAND can co-exist on da850/omap-l138 as they are using different chip selects. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> --- Since the previous version, EMA_BA_0 pin has been removed from the mux table as this pin is not being used on DA850/OMAP-L138 EVM for NOR. This patch depends on the following patches which I have submitted to davinci git: [PATCH v2] davinci: Configure MDIO pins for EMAC [PATCH v2] davinci: Add platform support for da850/omap-l138 GLCD [PATCH v2] davinci: Add MMC/SD support for da850/omap-l138 [PATCH v2] davinci: Add NAND flash support for DA850/OMAP-L138 arch/arm/mach-davinci/board-da850-evm.c | 60 ++++++++++++++++++++++++++++ arch/arm/mach-davinci/da850.c | 50 +++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 2 + arch/arm/mach-davinci/include/mach/mux.h | 34 ++++++++++++++++ 4 files changed, 146 insertions(+), 0 deletions(-)