From patchwork Thu Aug 13 21:36:25 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rajashekhara, Sudhakar" X-Patchwork-Id: 41038 Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n7DC9ivg007736 for ; Thu, 13 Aug 2009 12:09:45 GMT Received: from dlep34.itg.ti.com ([157.170.170.115]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id n7DC7uBB024046; Thu, 13 Aug 2009 07:08:01 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep34.itg.ti.com (8.13.7/8.13.7) with ESMTP id n7DC7tHm013410; Thu, 13 Aug 2009 07:07:55 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 94C5B80627; Thu, 13 Aug 2009 07:07:55 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp53.itg.ti.com (dflp53.itg.ti.com [128.247.5.6]) by linux.omap.com (Postfix) with ESMTP id F099780626 for ; Thu, 13 Aug 2009 07:07:54 -0500 (CDT) Received: from tidmzi-ftp.india.ext.ti.com (localhost [127.0.0.1]) by dflp53.itg.ti.com (8.13.8/8.13.8) with SMTP id n7DC7qdf012843 for ; Thu, 13 Aug 2009 07:07:53 -0500 (CDT) Received: from symphonyindia.ti.com (symphony-ftp [192.168.247.11]) by tidmzi-ftp.india.ext.ti.com (Postfix) with SMTP id 163C13886B for ; Thu, 13 Aug 2009 17:35:00 +0530 (IST) Received: from localhost.localdomain ([192.168.247.76]) by symphonyindia.ti.com (8.13.1/8.12.10) with ESMTP id n7DC2N80022639; Thu, 13 Aug 2009 17:32:23 +0530 From: Sudhakar Rajashekhara To: davinci-linux-open-source@linux.davincidsp.com Date: Thu, 13 Aug 2009 17:36:25 -0400 Message-Id: <1250199385-11811-1-git-send-email-sudhakar.raj@ti.com> X-Mailer: git-send-email 1.5.6 Cc: Subject: [PATCH v3] davinci: Add NOR flash support for da850/omap-l138 X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.4 Precedence: list List-Id: davinci-linux-open-source.linux.davincidsp.com List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com This patch adds platform data for the 8MB NOR flash found on da850/omap-l138 EVM. Both NOR and NAND can co-exist on da850/omap-l138 as they are using different chip selects. Signed-off-by: Sudhakar Rajashekhara --- Since the previous version: 1. Removed #ifdef macro guards from the board file. 2. Defined macros for CS2 offset and the value being written to this offset. 3. Value at the CS2 offset of AEMIOF is being read before writing to it. 4. Corrected the argument to ioremap() function. This patch is dependent on the following patches which I have submitted earlier: [PATCH] davinci: Macro to convert GPIO signal to GPIO pin number [PATCH v3] davinci: Add platform support for da850/omap-l138 GLCD [PATCH v3] davinci: Add MMC/SD support for da850/omap-l138 [PATCH v3] davinci: Add NAND flash support for DA850/OMAP-L138 arch/arm/mach-davinci/board-da850-evm.c | 59 ++++++++++++++++++++++++++++ arch/arm/mach-davinci/da850.c | 50 +++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 2 + arch/arm/mach-davinci/include/mach/mux.h | 34 ++++++++++++++++ 4 files changed, 145 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 62d37cb..70a2f48 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -41,6 +42,39 @@ #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) +static struct mtd_partition da850_evm_norflash_partition[] = { + { + .name = "NOR filesystem", + .offset = 0, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0, + }, +}; + +static struct physmap_flash_data da850_evm_norflash_data = { + .width = 2, + .parts = da850_evm_norflash_partition, + .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition), +}; + +static struct resource da850_evm_norflash_resource[] = { + { + .start = DA8XX_AEMIF_CS2_BASE, + .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_evm_norflash_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &da850_evm_norflash_data, + }, + .num_resources = 1, + .resource = da850_evm_norflash_resource, +}; + /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash * (128K blocks). It may be used instead of the (default) SPI flash * to boot, using TI's tools to install the secondary boot loader @@ -120,6 +154,7 @@ static struct davinci_uart_config da850_evm_uart_config __initdata = { static struct platform_device *da850_evm_devices[] __initdata = { &da850_evm_nandflash_device, + &da850_evm_norflash_device, }; /* davinci da850 evm audio machine driver */ @@ -192,6 +227,23 @@ static int da850_lcd_hw_init(void) return 0; } +#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10 +#define DA8XX_AEMIF_ASIZE_16BIT 0x1 + +static void __init da850_evm_init_nor(void) +{ + void __iomem *aemif_addr; + + aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K); + + /* Configure data bus width of CS2 to 16 bit */ + writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) | + DA8XX_AEMIF_ASIZE_16BIT, + aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET); + + iounmap(aemif_addr); +} + static __init void da850_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; @@ -202,6 +254,13 @@ static __init void da850_evm_init(void) pr_warning("da850_evm_init: nand mux setup failed: %d\n", ret); + ret = da8xx_pinmux_setup(da850_nor_pins); + if (ret) + pr_warning("da850_evm_init: nor mux setup failed: %d\n", + ret); + + da850_evm_init_nor(); + platform_add_devices(da850_evm_devices, ARRAY_SIZE(da850_evm_devices)); diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index db42094..192d719 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -471,6 +471,40 @@ static const struct mux_config da850_pins[] = { MUX_CFG(DA850, NEMA_CS_4, 7, 8, 15, 1, false) MUX_CFG(DA850, NEMA_WE, 7, 16, 15, 1, false) MUX_CFG(DA850, NEMA_OE, 7, 20, 15, 1, false) + MUX_CFG(DA850, EMA_A_0, 12, 28, 15, 1, false) + MUX_CFG(DA850, EMA_A_3, 12, 16, 15, 1, false) + MUX_CFG(DA850, EMA_A_4, 12, 12, 15, 1, false) + MUX_CFG(DA850, EMA_A_5, 12, 8, 15, 1, false) + MUX_CFG(DA850, EMA_A_6, 12, 4, 15, 1, false) + MUX_CFG(DA850, EMA_A_7, 12, 0, 15, 1, false) + MUX_CFG(DA850, EMA_A_8, 11, 28, 15, 1, false) + MUX_CFG(DA850, EMA_A_9, 11, 24, 15, 1, false) + MUX_CFG(DA850, EMA_A_10, 11, 20, 15, 1, false) + MUX_CFG(DA850, EMA_A_11, 11, 16, 15, 1, false) + MUX_CFG(DA850, EMA_A_12, 11, 12, 15, 1, false) + MUX_CFG(DA850, EMA_A_13, 11, 8, 15, 1, false) + MUX_CFG(DA850, EMA_A_14, 11, 4, 15, 1, false) + MUX_CFG(DA850, EMA_A_15, 11, 0, 15, 1, false) + MUX_CFG(DA850, EMA_A_16, 10, 28, 15, 1, false) + MUX_CFG(DA850, EMA_A_17, 10, 24, 15, 1, false) + MUX_CFG(DA850, EMA_A_18, 10, 20, 15, 1, false) + MUX_CFG(DA850, EMA_A_19, 10, 16, 15, 1, false) + MUX_CFG(DA850, EMA_A_20, 10, 12, 15, 1, false) + MUX_CFG(DA850, EMA_A_21, 10, 8, 15, 1, false) + MUX_CFG(DA850, EMA_A_22, 10, 4, 15, 1, false) + MUX_CFG(DA850, EMA_A_23, 10, 0, 15, 1, false) + MUX_CFG(DA850, EMA_D_8, 8, 28, 15, 1, false) + MUX_CFG(DA850, EMA_D_9, 8, 24, 15, 1, false) + MUX_CFG(DA850, EMA_D_10, 8, 20, 15, 1, false) + MUX_CFG(DA850, EMA_D_11, 8, 16, 15, 1, false) + MUX_CFG(DA850, EMA_D_12, 8, 12, 15, 1, false) + MUX_CFG(DA850, EMA_D_13, 8, 8, 15, 1, false) + MUX_CFG(DA850, EMA_D_14, 8, 4, 15, 1, false) + MUX_CFG(DA850, EMA_D_15, 8, 0, 15, 1, false) + MUX_CFG(DA850, EMA_BA_1, 5, 24, 15, 1, false) + MUX_CFG(DA850, EMA_CLK, 6, 0, 15, 1, false) + MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false) + MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false) /* GPIO function */ MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) MUX_CFG(DA850, GPIO8_10, 18, 28, 15, 8, false) @@ -545,6 +579,22 @@ const short da850_nand_pins[] __initdata = { -1 }; +const short da850_nor_pins[] __initdata = { + DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, + DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1, + DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5, + DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9, + DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13, + DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1, + DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5, + DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9, + DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13, + DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17, + DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21, + DA850_EMA_A_22, DA850_EMA_A_23, + -1 +}; + /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { [IRQ_DA8XX_COMMTX] = 7, diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 77e5d23..d4095d0 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -40,6 +40,7 @@ #define DA8XX_PSC1_BASE 0x01e27000 #define DA8XX_LCD_CNTRL_BASE 0x01e13000 #define DA8XX_MMCSD0_BASE 0x01c40000 +#define DA8XX_AEMIF_CS2_BASE 0x60000000 #define DA8XX_AEMIF_CS3_BASE 0x62000000 #define DA8XX_AEMIF_CTL_BASE 0x68000000 @@ -113,6 +114,7 @@ extern const short da850_mcasp_pins[]; extern const short da850_lcdcntl_pins[]; extern const short da850_mmcsd0_pins[]; extern const short da850_nand_pins[]; +extern const short da850_nor_pins[]; int da8xx_pinmux_setup(const short pins[]); diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index ee6f29d..88cd22a 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h @@ -821,6 +821,40 @@ enum davinci_da850_index { DA850_NEMA_CS_4, DA850_NEMA_WE, DA850_NEMA_OE, + DA850_EMA_D_15, + DA850_EMA_D_14, + DA850_EMA_D_13, + DA850_EMA_D_12, + DA850_EMA_D_11, + DA850_EMA_D_10, + DA850_EMA_D_9, + DA850_EMA_D_8, + DA850_EMA_A_0, + DA850_EMA_A_3, + DA850_EMA_A_4, + DA850_EMA_A_5, + DA850_EMA_A_6, + DA850_EMA_A_7, + DA850_EMA_A_8, + DA850_EMA_A_9, + DA850_EMA_A_10, + DA850_EMA_A_11, + DA850_EMA_A_12, + DA850_EMA_A_13, + DA850_EMA_A_14, + DA850_EMA_A_15, + DA850_EMA_A_16, + DA850_EMA_A_17, + DA850_EMA_A_18, + DA850_EMA_A_19, + DA850_EMA_A_20, + DA850_EMA_A_21, + DA850_EMA_A_22, + DA850_EMA_A_23, + DA850_EMA_BA_1, + DA850_EMA_CLK, + DA850_EMA_WAIT_1, + DA850_NEMA_CS_2, /* GPIO function */ DA850_GPIO2_15,