From patchwork Tue Sep 1 22:53:19 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: santiago.nunez@ridgerun.com X-Patchwork-Id: 45113 Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n81MsUFS023858 for ; Tue, 1 Sep 2009 22:54:31 GMT Received: from dlep33.itg.ti.com ([157.170.170.112]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id n81Mr3Z9010405; Tue, 1 Sep 2009 17:53:08 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id n81Mr2FK020605; Tue, 1 Sep 2009 17:53:03 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id CF2EB80628; Tue, 1 Sep 2009 17:53:02 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp52.itg.ti.com (dflp52.itg.ti.com [128.247.22.96]) by linux.omap.com (Postfix) with ESMTP id AF3FF80626 for ; Tue, 1 Sep 2009 17:53:01 -0500 (CDT) Received: from neches.ext.ti.com (localhost [127.0.0.1]) by dflp52.itg.ti.com (8.13.7/8.13.7) with ESMTP id n81Mr1M6029589 for ; Tue, 1 Sep 2009 17:53:01 -0500 (CDT) Received: from mail31-tx2-R.bigfish.com (mail-tx2.bigfish.com [65.55.88.111]) by neches.ext.ti.com (8.13.7/8.13.7) with ESMTP id n81MquM3028973 for ; Tue, 1 Sep 2009 17:53:01 -0500 Received: from mail31-tx2 (localhost.localdomain [127.0.0.1]) by mail31-tx2-R.bigfish.com (Postfix) with ESMTP id 51C293590348 for ; Tue, 1 Sep 2009 22:52:56 +0000 (UTC) X-SpamScore: 7 X-BigFish: vps7(zza4b1ozz1202hzzz2fh247h63h) X-Spam-TCS-SCL: 2:0 X-FB-SS: 5, X-MS-Exchange-Organization-Antispam-Report: OrigIP: 74.208.67.6; Service: EHS Received: by mail31-tx2 (MessageSwitch) id 1251845574152899_20653; Tue, 1 Sep 2009 22:52:54 +0000 (UCT) Received: from mail.navvo.net (mail.navvo.net [74.208.67.6]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail31-tx2.bigfish.com (Postfix) with ESMTP id 0D7203020059; Tue, 1 Sep 2009 22:52:54 +0000 (UTC) Received: from [200.122.155.113] (helo=localhost.localdomain) by mail.navvo.net with esmtpa (Exim 4.63) (envelope-from ) id 1MicDb-00040E-Gh; Tue, 01 Sep 2009 17:52:53 -0500 From: santiago.nunez@ridgerun.com To: m-karicheri2@ti.com Date: Tue, 1 Sep 2009 16:53:19 -0600 Message-Id: <1251845599-18040-1-git-send-email-santiago.nunez@ridgerun.com> X-Mailer: git-send-email 1.6.0.4 X-SA-Exim-Connect-IP: 200.122.155.113 X-SA-Exim-Mail-From: santiago.nunez@ridgerun.com X-Spam-Checker-Version: SpamAssassin 3.1.7-deb (2006-10-05) on mail.navvo.net X-Spam-Level: X-Spam-Status: No, score=-2.7 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00, NO_REAL_NAME autolearn=ham version=3.1.7-deb X-SA-Exim-Version: 4.2.1 (built Tue, 09 Jan 2007 17:23:22 +0000) X-SA-Exim-Scanned: Yes (on mail.navvo.net) Cc: davinci-linux-open-source@linux.davincidsp.com, clark.becker@ridgerun.com, Santiago Nunez-Corrales , todd.fischer@ridgerun.com Subject: [PATCH 2/6 v3] Updated Support for TVP7002 in dm365 board X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.4 Precedence: list List-Id: davinci-linux-open-source.linux.davincidsp.com List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com From: Santiago Nunez-Corrales This patch provides support for TVP7002 in architecture definitions within DM365. Moved tvp7002 platform data here and cleaned up code. Signed-off-by: Santiago Nunez-Corrales --- arch/arm/mach-davinci/board-dm365-evm.c | 66 +++++++++++++++++++++++++++++- 1 files changed, 63 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 362ac62..4ebfbb9 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -42,7 +42,9 @@ #include #include #include +#include #include +#include static inline int have_imager(void) @@ -53,14 +55,20 @@ static inline int have_imager(void) static inline int have_tvp7002(void) { - /* REVISIT when it's supported, trigger via Kconfig */ +#ifdef CONFIG_VIDEO_TVP7002 + return 1; +#else return 0; +#endif } #define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000 #define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 #define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 +#define DM365_ASYNC_EMIF_DATA_CE1_REG3 0x18 +#define DM365_ASYNC_EMIF_VIDEO_MUX_MASK (0x07070707) +#define DM365_ASYNC_EMIF_TVP7002_SEL (0x01010101) #define DM365_EVM_PHY_MASK (0x2) #define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ @@ -109,6 +117,14 @@ static struct tvp514x_platform_data tvp5146_pdata = { .vs_polarity = 1 }; +/* tvp7002 platform data, used during reset and probe operations */ +static struct tvp7002_platform_data tvp7002_pdata = { + .clk_polarity = 1, + .hs_polarity = 1, + .vs_polarity = 1, + .fid_polarity = 1, +}; + /* NOTE: this is geared for the standard config, with a socketed * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you * swap chips, maybe with a different block size, partitioning may @@ -243,6 +259,22 @@ static struct v4l2_input tvp5146_inputs[] = { }, }; +#define TVP7002_STD_ALL (V4L2_STD_525P_60 | V4L2_STD_625P_50 |\ + V4L2_STD_525I_60 | V4L2_STD_625I_50 |\ + V4L2_STD_720P_50 | V4L2_STD_720P_60 |\ + V4L2_STD_1080I_50 | V4L2_STD_1080I_60 |\ + V4L2_STD_1080P_50 | V4L2_STD_1080P_60) + +/* Inputs available at the TVP7002 */ +static struct v4l2_input tvp7002_inputs[] = { + { + .index = 0, + .name = "Component", + .type = V4L2_INPUT_TYPE_CAMERA, + .std = TVP7002_STD_ALL, + }, +}; + /* * this is the route info for connecting each input to decoder * ouput that goes to vpfe. There is a one to one correspondence @@ -276,6 +308,22 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = { I2C_BOARD_INFO("tvp5146", 0x5d), .platform_data = &tvp5146_pdata, }, + }, + { + .module_name = "tvp7002", + .grp_id = 0, + .num_inputs = ARRAY_SIZE(tvp7002_inputs), + .inputs = tvp7002_inputs, + .can_route = 1, + .ccdc_if_params = { + .if_type = VPFE_BT1120, + .hdpol = VPFE_PINPOL_POSITIVE, + .vdpol = VPFE_PINPOL_POSITIVE, + }, + .board_info = { + I2C_BOARD_INFO("tvp7002", 0x5c), + .platform_data = &tvp7002_pdata, + }, } }; @@ -439,6 +487,16 @@ static int __init cpld_leds_init(void) /* run after subsys_initcall() for LEDs */ fs_initcall(cpld_leds_init); +/* Set the input mux for TVP7002 */ +int tvp7002_set_input_mux(unsigned char channel) +{ + u32 val; + val = __raw_readl(DM365_ASYNC_EMIF_DATA_CE1_REG3); + val &= ~DM365_ASYNC_EMIF_VIDEO_MUX_MASK; + val |= DM365_ASYNC_EMIF_TVP7002_SEL; + __raw_writel(val, DM365_ASYNC_EMIF_DATA_CE1_REG3); + return 0; +} static void __init evm_init_cpld(void) { @@ -519,6 +577,8 @@ fail: mux |= 2; resets &= ~BIT(2); label = "tvp7002 HD"; + /* Call the input setter */ + tvp7002_set_input_mux(0); } else { /* default to tvp5146 */ mux |= 5; @@ -526,8 +586,8 @@ fail: label = "tvp5146 SD"; } } - __raw_writeb(mux, cpld + CPLD_MUX); - __raw_writeb(resets, cpld + CPLD_RESETS); + __raw_writel(mux, cpld + CPLD_MUX); + __raw_writel(resets, cpld + CPLD_RESETS); pr_info("EVM: %s video input\n", label); /* REVISIT export switches: NTSC/PAL (SW5.6), EXTRA1 (SW5.2), etc */