@@ -29,6 +29,7 @@
#include <linux/phy.h>
#include <linux/clk.h>
#include <linux/videodev2.h>
+#include <linux/usb/musb.h>
#include <media/tvp514x.h>
@@ -63,6 +64,8 @@
#define LXT971_PHY_ID (0x001378e2)
#define LXT971_PHY_MASK (0xfffffff0)
+static int dm644x_evm_set_vbus(struct device *dev, int is_on);
+
static struct mtd_partition davinci_evm_norflash_partitions[] = {
/* bootloader (UBL, U-Boot, etc) in first 5 sectors */
{
@@ -477,7 +480,6 @@ evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
/* irlml6401 switches over 1A, in under 8 msec;
* now it can be managed by nDRV_VBUS ...
*/
- setup_usb(500, 8);
return 0;
}
@@ -699,6 +701,21 @@ static int davinci_phy_fixup(struct phy_device *phydev)
#define HAS_NAND 0
#endif
+static struct musb_hdrc_platform_data usb_evm_data[] = {
+ {
+#if defined(CONFIG_USB_MUSB_OTG)
+ .mode = MUSB_OTG,
+#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
+ .mode = MUSB_PERIPHERAL,
+#elif defined(CONFIG_USB_MUSB_HOST)
+ .mode = MUSB_HOST,
+#endif
+ .power = 255,
+ .potpgt = 8,
+ .set_vbus = dm644x_evm_set_vbus,
+ }
+};
+
static __init void davinci_evm_init(void)
{
struct clk *aemif_clk;
@@ -747,6 +764,7 @@ static __init void davinci_evm_init(void)
phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
davinci_phy_fixup);
+ dm644x_usb_configure(usb_evm_data, ARRAY_SIZE(usb_evm_data));
}
static __init void davinci_evm_irq_init(void)
@@ -754,6 +772,32 @@ static __init void davinci_evm_irq_init(void)
davinci_irq_init();
}
+#define GPIO_nVBUS_DRV (DAVINCI_N_GPIO + 16) /* USB VBUS line */
+static int vbus_state = -1;
+static void evm_deferred_drvvbus(struct work_struct *ignored)
+{
+ gpio_set_value_cansleep(GPIO_nVBUS_DRV, vbus_state);
+ vbus_state = !vbus_state;
+}
+
+/*
+ * DM644x EVM USB VBUS handler. On TI DM644x EVM USB VBUS is controller
+ * through I2C expander (0x3A) lines. Tthis function schedules a
+ * work thread to handle the actual VBUS on/off operations.
+ */
+static int dm644x_evm_set_vbus(struct device *dev, int is_on)
+{
+ static DECLARE_WORK(evm_vbus_work, evm_deferred_drvvbus);
+
+ is_on = is_on ? 1 : 0;
+ if (vbus_state == is_on)
+ return 0;
+
+ vbus_state = !is_on;
+ schedule_work(&evm_vbus_work);
+ return 0;
+}
+
MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
/* Maintainer: MontaVista Software <source@mvista.com> */
.phys_io = IO_PHYS,
@@ -28,6 +28,8 @@
#include <mach/serial.h>
#include <mach/common.h>
#include <mach/asp.h>
+#include <mach/usb_musb.h>
+#include <mach/usb.h>
#include "clock.h"
#include "mux.h"
@@ -761,6 +763,74 @@ void __init dm644x_init(void)
davinci_common_init(&davinci_soc_info_dm644x);
}
+/*
+ * Configure the USB PHY for DM644x platforms.
+ */
+static int dm644x_usb_phy_config(struct device *dev, u8 mode, int is_on)
+{
+ u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
+
+ if (is_on) {
+ /* power everything up; start the on-chip PHY and its PLL */
+ phy_ctrl &= ~(USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN);
+ phy_ctrl |= USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON;
+ } else {
+ /* powerdown the on-chip PHY, its PLL, and the OTG block */
+ phy_ctrl &= ~(USBPHY_SESNDEN | USBPHY_VBDTCTEN |
+ USBPHY_PHYPLLON);
+ phy_ctrl |= USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN;
+ }
+
+ __raw_writel(phy_ctrl, USB_PHY_CTRL);
+
+ if (is_on) {
+ /* wait for PLL to lock before proceeding */
+ while ((__raw_readl(USB_PHY_CTRL) & USBPHY_PHYCLKGD) == 0)
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static struct resource usb_resources[] = {
+ {
+ .start = DAVINCI_USB_OTG_BASE,
+ .end = DAVINCI_USB_OTG_BASE + 0x5ff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_USBINT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct plat_res_data dm644x_usb_res;
+static struct usb_plat_data dm644x_usb_plat_data;
+
+/*
+ * Initialize DM644x related USB information such as Memory maps, IRQ etc.
+ * Since DM644x supprot a single MUSB controller initialize the instance
+ * value to 1.
+ */
+void dm644x_usb_configure(struct musb_hdrc_platform_data *pdata, u8 num_inst)
+{
+ pdata->phy_config = dm644x_usb_phy_config;
+
+ dm644x_usb_res.plat_data = pdata;
+ dm644x_usb_res.res_data = usb_resources;
+ dm644x_usb_res.num_res = ARRAY_SIZE(usb_resources);
+
+ dm644x_usb_plat_data.prdata = &dm644x_usb_res;
+ dm644x_usb_plat_data.num_inst = num_inst;
+
+ /* Call the generic platform register function. The USB
+ * configuration w.r.t no. of ep's, capabalities etc. are common
+ * across DaVinci platforms and hence allow the generic handler
+ * to populate the information.
+ */
+ setup_usb(&dm644x_usb_plat_data);
+}
+
static int __init dm644x_init_devices(void)
{
if (!cpu_is_davinci_dm644x())
@@ -27,6 +27,7 @@
#include <mach/emac.h>
#include <mach/asp.h>
#include <media/davinci/vpfe_capture.h>
+#include <linux/usb/musb.h>
#define DM644X_EMAC_BASE (0x01C80000)
#define DM644X_EMAC_CNTRL_OFFSET (0x0000)
@@ -38,5 +39,7 @@
void __init dm644x_init(void);
void __init dm644x_init_asp(struct snd_platform_data *pdata);
void dm644x_set_vpfe_config(struct vpfe_config *cfg);
+extern void dm644x_usb_configure(struct musb_hdrc_platform_data *pdata,
+ u8 num_inst);
#endif /* __ASM_ARCH_DM644X_H */
@@ -10,6 +10,8 @@
#ifndef __ASM_ARCH_USB_H
#define __ASM_ARCH_USB_H
+#include <mach/hardware.h>
+#include <linux/io.h>
/* DA8xx CFGCHIP2 (USB 2.0 PHY Control) register bits */
#define CFGCHIP2_PHYCLKGD (1 << 17)
@@ -34,6 +36,20 @@
#define CFGCHIP2_REFFREQ_24MHZ (2 << 0)
#define CFGCHIP2_REFFREQ_48MHZ (3 << 0)
+/* DMxxxx USB PHY definitions */
+#define USBPHY_CTL_PADDR (DAVINCI_SYSTEM_MODULE_BASE + 0x34)
+#define USB_PHY_CTRL IO_ADDRESS(USBPHY_CTL_PADDR)
+
+#define USBPHY_PHYCLKGD BIT(8)
+#define USBPHY_SESNDEN BIT(7) /* v(sess_end) comparator */
+#define USBPHY_VBDTCTEN BIT(6) /* v(bus) comparator */
+#define USBPHY_VBUSSENS BIT(5) /* (dm355,ro) is vbus > 0.5V */
+#define USBPHY_PHYPLLON BIT(4) /* override pll suspend */
+#define USBPHY_CLKO1SEL BIT(3)
+#define USBPHY_OSCPDWN BIT(2)
+#define USBPHY_OTGPDWN BIT(1)
+#define USBPHY_PHYPDWN BIT(0)
+
struct da8xx_ohci_root_hub;
typedef void (*da8xx_ocic_handler_t)(struct da8xx_ohci_root_hub *hub,