From patchwork Wed Jan 6 18:32:01 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 71373 Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id o06IbMGt014057 for ; Wed, 6 Jan 2010 18:37:22 GMT Received: from dlep33.itg.ti.com ([157.170.170.112]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id o06IbLgx010958 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 6 Jan 2010 12:37:21 -0600 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id o06IbLMd023657 for ; Wed, 6 Jan 2010 12:37:21 -0600 (CST) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 9E3BC8062A for ; Wed, 6 Jan 2010 12:37:20 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp53.itg.ti.com (dflp53.itg.ti.com [128.247.5.6]) by linux.omap.com (Postfix) with ESMTP id 04C338062A for ; Wed, 6 Jan 2010 12:32:59 -0600 (CST) Received: from white.ext.ti.com (localhost [127.0.0.1]) by dflp53.itg.ti.com (8.13.8/8.13.8) with ESMTP id o06IWwER009123 for ; Wed, 6 Jan 2010 12:32:58 -0600 (CST) Received: from psmtp.com (na3sys009amx196.postini.com [74.125.149.177]) by white.ext.ti.com (8.13.7/8.13.7) with SMTP id o06IWuxB023244 for ; Wed, 6 Jan 2010 12:32:57 -0600 Received: from source ([209.85.216.189]) by na3sys009amx196.postini.com ([74.125.148.10]) with SMTP; Wed, 06 Jan 2010 13:32:57 EST Received: by mail-px0-f189.google.com with SMTP id 27so11130037pxi.4 for ; Wed, 06 Jan 2010 10:32:56 -0800 (PST) Received: by 10.115.65.38 with SMTP id s38mr8979280wak.103.1262802776603; Wed, 06 Jan 2010 10:32:56 -0800 (PST) Received: from localhost (deeprootsystems.com [216.254.16.51]) by mx.google.com with ESMTPS id 21sm17234333pzk.7.2010.01.06.10.32.55 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 06 Jan 2010 10:32:56 -0800 (PST) From: Kevin Hilman To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 19/35] TI Davinci EMAC : Abstract Buffer address translation logic. Date: Wed, 6 Jan 2010 10:32:01 -0800 Message-Id: <1262802737-6601-20-git-send-email-khilman@deeprootsystems.com> X-Mailer: git-send-email 1.6.6.rc2.1.g42108 In-Reply-To: <1262802737-6601-19-git-send-email-khilman@deeprootsystems.com> References: <1262802737-6601-1-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-2-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-3-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-4-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-5-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-6-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-7-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-8-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-9-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-10-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-11-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-12-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-13-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-14-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-15-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-16-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-17-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-18-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-19-git-send-email-khilman@deeprootsystems.com> X-pstn-neptune: 0/0/0.00/0 X-pstn-levels: (S:59.09217/99.90000 CV:99.9000 FC:95.5390 LC:95.5390 R:95.9108 P:95.9108 M:97.0282 C:98.6951 ) X-pstn-settings: 2 (0.5000:0.5000) s cv gt3 gt2 gt1 X-pstn-addresses: from [db-null] Cc: Sriramakrishnan , davinci-linux-open-source@linux.davincidsp.com X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: davinci-linux-open-source-bounces+patchwork-davinci=patchwork.kernel.org@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces+patchwork-davinci=patchwork.kernel.org@linux.davincidsp.com diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 8c356b5..a46286e 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -464,6 +464,7 @@ struct emac_priv { void __iomem *ctrl_base; void __iomem *emac_ctrl_ram; u32 ctrl_ram_size; + u32 hw_ram_addr; struct emac_txch *txch[EMAC_DEF_MAX_TX_CH]; struct emac_rxch *rxch[EMAC_DEF_MAX_RX_CH]; u32 link; /* 1=link on, 0=link off */ @@ -497,11 +498,9 @@ static struct clk *emac_clk; static unsigned long emac_bus_frequency; static unsigned long mdio_max_freq; -/* EMAC internal utility function */ -static inline u32 emac_virt_to_phys(void __iomem *addr) -{ - return (u32 __force) io_v2p(addr); -} +#define emac_virt_to_phys(addr, priv) \ + (((u32 __force)(addr) - (u32 __force)(priv->emac_ctrl_ram)) \ + + priv->hw_ram_addr) /* Cache macros - Packet buffers would be from skb pool which is cached */ #define EMAC_VIRT_NOCACHE(addr) (addr) @@ -1309,7 +1308,7 @@ static int emac_tx_bdproc(struct emac_priv *priv, u32 ch, u32 budget) curr_bd = txch->active_queue_head; if (NULL == curr_bd) { emac_write(EMAC_TXCP(ch), - emac_virt_to_phys(txch->last_hw_bdprocessed)); + emac_virt_to_phys(txch->last_hw_bdprocessed, priv)); txch->no_active_pkts++; spin_unlock_irqrestore(&priv->tx_lock, flags); return 0; @@ -1319,7 +1318,7 @@ static int emac_tx_bdproc(struct emac_priv *priv, u32 ch, u32 budget) while ((curr_bd) && ((frame_status & EMAC_CPPI_OWNERSHIP_BIT) == 0) && (pkts_processed < budget)) { - emac_write(EMAC_TXCP(ch), emac_virt_to_phys(curr_bd)); + emac_write(EMAC_TXCP(ch), emac_virt_to_phys(curr_bd, priv)); txch->active_queue_head = curr_bd->next; if (frame_status & EMAC_CPPI_EOQ_BIT) { if (curr_bd->next) { /* misqueued packet */ @@ -1406,7 +1405,7 @@ static int emac_send(struct emac_priv *priv, struct emac_netpktobj *pkt, u32 ch) txch->active_queue_tail = curr_bd; if (1 != txch->queue_active) { emac_write(EMAC_TXHDP(ch), - emac_virt_to_phys(curr_bd)); + emac_virt_to_phys(curr_bd, priv)); txch->queue_active = 1; } ++txch->queue_reinit; @@ -1418,10 +1417,11 @@ static int emac_send(struct emac_priv *priv, struct emac_netpktobj *pkt, u32 ch) tail_bd->next = curr_bd; txch->active_queue_tail = curr_bd; tail_bd = EMAC_VIRT_NOCACHE(tail_bd); - tail_bd->h_next = (int)emac_virt_to_phys(curr_bd); + tail_bd->h_next = (int)emac_virt_to_phys(curr_bd, priv); frame_status = tail_bd->mode; if (frame_status & EMAC_CPPI_EOQ_BIT) { - emac_write(EMAC_TXHDP(ch), emac_virt_to_phys(curr_bd)); + emac_write(EMAC_TXHDP(ch), + emac_virt_to_phys(curr_bd, priv)); frame_status &= ~(EMAC_CPPI_EOQ_BIT); tail_bd->mode = frame_status; ++txch->end_of_queue_add; @@ -1611,7 +1611,8 @@ static int emac_init_rxch(struct emac_priv *priv, u32 ch, char *param) } /* populate the hardware descriptor */ - curr_bd->h_next = emac_virt_to_phys(rxch->active_queue_head); + curr_bd->h_next = emac_virt_to_phys(rxch->active_queue_head, + priv); /* FIXME buff_ptr = dma_map_single(... data_ptr ...) */ curr_bd->buff_ptr = virt_to_phys(curr_bd->data_ptr); curr_bd->off_b_len = rxch->buf_size; @@ -1886,7 +1887,7 @@ static void emac_addbd_to_rx_queue(struct emac_priv *priv, u32 ch, rxch->active_queue_tail = curr_bd; if (0 != rxch->queue_active) { emac_write(EMAC_RXHDP(ch), - emac_virt_to_phys(rxch->active_queue_head)); + emac_virt_to_phys(rxch->active_queue_head, priv)); rxch->queue_active = 1; } } else { @@ -1897,11 +1898,11 @@ static void emac_addbd_to_rx_queue(struct emac_priv *priv, u32 ch, rxch->active_queue_tail = curr_bd; tail_bd->next = curr_bd; tail_bd = EMAC_VIRT_NOCACHE(tail_bd); - tail_bd->h_next = emac_virt_to_phys(curr_bd); + tail_bd->h_next = emac_virt_to_phys(curr_bd, priv); frame_status = tail_bd->mode; if (frame_status & EMAC_CPPI_EOQ_BIT) { emac_write(EMAC_RXHDP(ch), - emac_virt_to_phys(curr_bd)); + emac_virt_to_phys(curr_bd, priv)); frame_status &= ~(EMAC_CPPI_EOQ_BIT); tail_bd->mode = frame_status; ++rxch->end_of_queue_add; @@ -1994,7 +1995,7 @@ static int emac_rx_bdproc(struct emac_priv *priv, u32 ch, u32 budget) curr_pkt->num_bufs = 1; curr_pkt->pkt_length = (frame_status & EMAC_RX_BD_PKT_LENGTH_MASK); - emac_write(EMAC_RXCP(ch), emac_virt_to_phys(curr_bd)); + emac_write(EMAC_RXCP(ch), emac_virt_to_phys(curr_bd, priv)); ++rxch->processed_bd; last_bd = curr_bd; curr_bd = last_bd->next; @@ -2005,7 +2006,7 @@ static int emac_rx_bdproc(struct emac_priv *priv, u32 ch, u32 budget) if (curr_bd) { ++rxch->mis_queued_packets; emac_write(EMAC_RXHDP(ch), - emac_virt_to_phys(curr_bd)); + emac_virt_to_phys(curr_bd, priv)); } else { ++rxch->end_of_queue; rxch->queue_active = 0; @@ -2106,7 +2107,7 @@ static int emac_hw_enable(struct emac_priv *priv) emac_write(EMAC_RXINTMASKSET, BIT(ch)); rxch->queue_active = 1; emac_write(EMAC_RXHDP(ch), - emac_virt_to_phys(rxch->active_queue_head)); + emac_virt_to_phys(rxch->active_queue_head, priv)); } /* Enable MII */ @@ -2702,6 +2703,12 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev) priv->ctrl_ram_size = pdata->ctrl_ram_size; priv->emac_ctrl_ram = priv->remap_addr + pdata->ctrl_ram_offset; + if (pdata->hw_ram_addr) + priv->hw_ram_addr = pdata->hw_ram_addr; + else + priv->hw_ram_addr = (u32 __force)res->start + + pdata->ctrl_ram_offset; + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (!res) { dev_err(emac_dev, "DaVinci EMAC: Error getting irq res\n"); diff --git a/include/linux/davinci_emac.h b/include/linux/davinci_emac.h index 6d894ef..7c930db 100644 --- a/include/linux/davinci_emac.h +++ b/include/linux/davinci_emac.h @@ -19,6 +19,7 @@ struct emac_platform_data { u32 ctrl_reg_offset; u32 ctrl_mod_reg_offset; u32 ctrl_ram_offset; + u32 hw_ram_addr; u32 mdio_reg_offset; u32 ctrl_ram_size; u32 phy_mask;