From patchwork Wed Jan 6 18:31:45 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 71367 Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id o06IZXPa013817 for ; Wed, 6 Jan 2010 18:35:33 GMT Received: from dlep34.itg.ti.com ([157.170.170.115]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id o06IXgh0008989 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 6 Jan 2010 12:33:42 -0600 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep34.itg.ti.com (8.13.7/8.13.7) with ESMTP id o06IXf8u001126; Wed, 6 Jan 2010 12:33:41 -0600 (CST) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 4F8DE8062D; Wed, 6 Jan 2010 12:33:41 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp53.itg.ti.com (dflp53.itg.ti.com [128.247.5.6]) by linux.omap.com (Postfix) with ESMTP id 1074D80626 for ; Wed, 6 Jan 2010 12:32:27 -0600 (CST) Received: from medina.ext.ti.com (localhost [127.0.0.1]) by dflp53.itg.ti.com (8.13.8/8.13.8) with ESMTP id o06IWQWC008926 for ; Wed, 6 Jan 2010 12:32:26 -0600 (CST) Received: from psmtp.com (na3sys009amx190.postini.com [74.125.149.171]) by medina.ext.ti.com (8.13.7/8.13.7) with SMTP id o06IWPeA019129 for ; Wed, 6 Jan 2010 12:32:26 -0600 Received: from source ([209.85.160.45]) by na3sys009amx190.postini.com ([74.125.148.10]) with SMTP; Wed, 06 Jan 2010 13:32:26 EST Received: by mail-pw0-f45.google.com with SMTP id 1so11617220pwj.24 for ; Wed, 06 Jan 2010 10:32:25 -0800 (PST) Received: by 10.142.66.7 with SMTP id o7mr3932524wfa.45.1262802745447; Wed, 06 Jan 2010 10:32:25 -0800 (PST) Received: from localhost (deeprootsystems.com [216.254.16.51]) by mx.google.com with ESMTPS id 22sm17157978pzk.10.2010.01.06.10.32.24 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 06 Jan 2010 10:32:24 -0800 (PST) From: Kevin Hilman To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 03/35] davinci: move DDR2 controller defines to memory.h Date: Wed, 6 Jan 2010 10:31:45 -0800 Message-Id: <1262802737-6601-4-git-send-email-khilman@deeprootsystems.com> X-Mailer: git-send-email 1.6.6.rc2.1.g42108 In-Reply-To: <1262802737-6601-3-git-send-email-khilman@deeprootsystems.com> References: <1262802737-6601-1-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-2-git-send-email-khilman@deeprootsystems.com> <1262802737-6601-3-git-send-email-khilman@deeprootsystems.com> X-pstn-neptune: 0/0/0.00/0 X-pstn-levels: (S:89.75857/99.90000 CV:99.9000 FC:95.5390 LC:95.5390 R:95.9108 P:95.9108 M:97.0282 C:98.6951 ) X-pstn-settings: 2 (0.5000:0.5000) s cv gt3 gt2 gt1 X-pstn-addresses: from [db-null] Cc: davinci-linux-open-source@linux.davincidsp.com X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c index 97a90f3..beda3b5 100644 --- a/arch/arm/mach-davinci/cpuidle.c +++ b/arch/arm/mach-davinci/cpuidle.c @@ -19,6 +19,7 @@ #include #include +#include #define DAVINCI_CPUIDLE_MAX_STATES 2 @@ -39,10 +40,6 @@ static struct cpuidle_driver davinci_idle_driver = { static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device); static void __iomem *ddr2_reg_base; -#define DDR2_SDRCR_OFFSET 0xc -#define DDR2_SRPD_BIT BIT(23) -#define DDR2_LPMODEN_BIT BIT(31) - static void davinci_save_ddr_power(int enter, bool pdown) { u32 val; diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h index 80309ae..7aeaf46 100644 --- a/arch/arm/mach-davinci/include/mach/memory.h +++ b/arch/arm/mach-davinci/include/mach/memory.h @@ -31,6 +31,10 @@ #define PHYS_OFFSET DAVINCI_DDR_BASE #endif +#define DDR2_SDRCR_OFFSET 0xc +#define DDR2_SRPD_BIT BIT(23) +#define DDR2_LPMODEN_BIT BIT(31) + /* * Increase size of DMA-consistent memory region */