From patchwork Thu Mar 25 21:43:52 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cyril Chemparathy X-Patchwork-Id: 88380 Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o2PLnXic004195 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 25 Mar 2010 21:50:09 GMT Received: from dlep33.itg.ti.com ([157.170.170.112]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id o2PLmFrK012933 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 25 Mar 2010 16:48:15 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id o2PLmF18002053; Thu, 25 Mar 2010 16:48:15 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id A11B980631; Thu, 25 Mar 2010 15:48:08 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dlep35.itg.ti.com (dlep35.itg.ti.com [157.170.170.118]) by linux.omap.com (Postfix) with ESMTP id A6DF88062A for ; Thu, 25 Mar 2010 15:44:05 -0600 (CST) Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep35.itg.ti.com (8.13.7/8.13.7) with ESMTP id o2PLi24U014669; Thu, 25 Mar 2010 16:44:03 -0500 (CDT) Received: from gtloginvm01.gt.design.ti.com (gtloginvm01.gt.design.ti.com [158.218.108.144]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id o2PLi2Z27864; Thu, 25 Mar 2010 16:44:02 -0500 (CDT) Received: from gtloginvm01.gt.design.ti.com (localhost.localdomain [127.0.0.1]) by gtloginvm01.gt.design.ti.com (8.13.1/8.13.1) with ESMTP id o2PLi1b1015123; Thu, 25 Mar 2010 17:44:01 -0400 Received: (from a0875269@localhost) by gtloginvm01.gt.design.ti.com (8.13.1/8.13.1/Submit) id o2PLi1ls015120; Thu, 25 Mar 2010 17:44:01 -0400 From: Cyril Chemparathy To: davinci-linux-open-source@linux.davincidsp.com Subject: [PATCH v2 09/16] Davinci: tnetv107x SOC specific header Date: Thu, 25 Mar 2010 17:43:52 -0400 Message-Id: <1269553439-14886-10-git-send-email-cyril@ti.com> X-Mailer: git-send-email 1.6.0.4 In-Reply-To: <1269553439-14886-9-git-send-email-cyril@ti.com> References: <1269553439-14886-1-git-send-email-cyril@ti.com> <1269553439-14886-2-git-send-email-cyril@ti.com> <1269553439-14886-3-git-send-email-cyril@ti.com> <1269553439-14886-4-git-send-email-cyril@ti.com> <1269553439-14886-5-git-send-email-cyril@ti.com> <1269553439-14886-6-git-send-email-cyril@ti.com> <1269553439-14886-7-git-send-email-cyril@ti.com> <1269553439-14886-8-git-send-email-cyril@ti.com> <1269553439-14886-9-git-send-email-cyril@ti.com> Cc: sshtylyov@mvista.com X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Greylist: Sender succeeded STARTTLS authentication, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 25 Mar 2010 21:50:09 +0000 (UTC) diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h new file mode 100644 index 0000000..5b6c597 --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h @@ -0,0 +1,74 @@ +/* + * Chip specific defines for TNETV107X SoC + * + * Author: Cyril Chemparathy + * + * 2009 (c) Texas Instruments, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __ASM_ARCH_DAVINCI_TNETV107X_H +#define __ASM_ARCH_DAVINCI_TNETV107X_H + +/* Base addresses for on-chip devices */ +#define TNETV107X_TPCC_BASE 0x01c00000 +#define TNETV107X_TPTC0_BASE 0x01c10000 +#define TNETV107X_TPTC1_BASE 0x01c10400 +#define TNETV107X_INTC_BASE 0x03000000 +#define TNETV107X_LCD_CONTROLLER_BASE 0x08030000 +#define TNETV107X_INTD_BASE 0x08038000 +#define TNETV107X_INTD_IPC_BASE 0x08038000 +#define TNETV107X_INTD_FAST_BASE 0x08039000 +#define TNETV107X_INTD_ASYNC_BASE 0x0803a000 +#define TNETV107X_INTD_SLOW_BASE 0x0803b000 +#define TNETV107X_PKA_BASE 0x08040000 +#define TNETV107X_RNG_BASE 0x08044000 +#define TNETV107X_TIMER0_BASE 0x08086500 +#define TNETV107X_TIMER1_BASE 0x08086600 +#define TNETV107X_WDT0_ARM_BASE 0x08086700 +#define TNETV107X_WDT1_DSP_BASE 0x08086800 +#define TNETV107X_CHIP_CFG_BASE 0x08087000 +#define TNETV107X_GPIO_BASE 0x08088000 +#define TNETV107X_TOUCHSCREEN_BASE 0x08088500 +#define TNETV107X_SDIO0_BASE 0x08088700 +#define TNETV107X_SDIO1_BASE 0x08088800 +#define TNETV107X_MDIO_BASE 0x08088900 +#define TNETV107X_KEYPAD_BASE 0x08088a00 +#define TNETV107X_SSP_BASE 0x08088c00 +#define TNETV107X_CLOCK_CONTROL_BASE 0x0808a000 +#define TNETV107X_PSC_BASE 0x0808b000 +#define TNETV107X_TDM0_BASE 0x08100000 +#define TNETV107X_TDM1_BASE 0x08100100 +#define TNETV107X_MCDMA_BASE 0x08108000 +#define TNETV107X_UART0_DMA_BASE 0x08108200 +#define TNETV107X_USBSS_BASE 0x08120000 +#define TNETV107X_VLYNQ_CONTROL_BASE 0x0810d000 +#define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000 +#define TNETV107X_VLYNQ_MEM_MAP_BASE 0x0c000000 +#define TNETV107X_IMCOP_BASE 0x01cc0000 +#define TNETV107X_MBX_LITE_BASE 0x07000000 +#define TNETV107X_ETHSS_BASE 0x0803c000 +#define TNETV107X_CPSW_BASE 0x0803c000 +#define TNETV107X_SPF_BASE 0x0803c800 +#define TNETV107X_IOPU_ETHSS_BASE 0x0803d000 +#define TNETV107X_VTP_CNTRL_0 0x0803d800 +#define TNETV107X_VTP_CNTRL_1 0x0803d900 +#define TNETV107X_UART2_DMA_BASE 0x08108400 +#define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000 +#define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000 +#define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE 0x44000000 +#define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE 0x48000000 +#define TNETV107X_DDR_BASE 0x80000000 + +/* Boot Configuration Parameters */ +#define TNETV107X_KICK0 (TNETV107X_CHIP_CFG_BASE + 0x38) +#define TNETV107X_KICK1 (TNETV107X_CHIP_CFG_BASE + 0x3c) +#define TNETV107X_KICK0_MAGIC 0x83e70b13 +#define TNETV107X_KICK1_MAGIC 0x95a4f1e0 + +#define TNETV107X_N_GPIOS 65 + +#endif /* __ASM_ARCH_DAVINCI_TNETV107X_H */ + +