From patchwork Thu Apr 29 22:27:32 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cyril Chemparathy X-Patchwork-Id: 95873 Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o3TMWNjO010708 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 29 Apr 2010 22:33:02 GMT Received: from dlep33.itg.ti.com ([157.170.170.112]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id o3TMUpRA023291 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 29 Apr 2010 17:30:51 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id o3TMUocw024907; Thu, 29 Apr 2010 17:30:50 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id C12FD80628; Thu, 29 Apr 2010 17:30:50 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dlep34.itg.ti.com (dlep34.itg.ti.com [157.170.170.115]) by linux.omap.com (Postfix) with ESMTP id 7EF868062B for ; Thu, 29 Apr 2010 17:27:51 -0500 (CDT) Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep34.itg.ti.com (8.13.7/8.13.7) with ESMTP id o3TMRkvi004464; Thu, 29 Apr 2010 17:27:47 -0500 (CDT) Received: from gtrgwdeb (gtrgwdeb.telogy.design.ti.com [158.218.102.24]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id o3TMRkP12036; Thu, 29 Apr 2010 17:27:46 -0500 (CDT) Received: by gtrgwdeb (Postfix, from userid 39959) id 612B31E0B26; Thu, 29 Apr 2010 18:27:45 -0400 (EDT) From: Cyril Chemparathy To: davinci-linux-open-source@linux.davincidsp.com Subject: [RFC 06/22] Davinci: gpio - fine grained locking Date: Thu, 29 Apr 2010 18:27:32 -0400 Message-Id: <1272580062-17663-7-git-send-email-cyril@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1272580062-17663-1-git-send-email-cyril@ti.com> References: <1272580062-17663-1-git-send-email-cyril@ti.com> Cc: sshtylyov@mvista.com X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Greylist: Sender succeeded STARTTLS authentication, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 29 Apr 2010 22:33:06 +0000 (UTC) diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index e422cd3..b62d5e2 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c @@ -33,8 +33,6 @@ struct davinci_gpio_regs { u32 intstat; }; -static DEFINE_SPINLOCK(gpio_lock); - #define chip2controller(chip) \ container_of(chip, struct davinci_gpio_controller, chip) @@ -83,10 +81,11 @@ static inline int __davinci_direction(struct gpio_chip *chip, { struct davinci_gpio_controller *d = chip2controller(chip); struct davinci_gpio_regs __iomem *g = d->regs; + unsigned long flags; u32 temp; u32 mask = 1 << offset; - spin_lock(&gpio_lock); + spin_lock_irqsave(&d->lock, flags); temp = __raw_readl(&g->dir); if (out) { temp &= ~mask; @@ -95,7 +94,7 @@ static inline int __davinci_direction(struct gpio_chip *chip, temp |= mask; } __raw_writel(temp, &g->dir); - spin_unlock(&gpio_lock); + spin_unlock_irqrestore(&d->lock, flags); return 0; } @@ -175,6 +174,8 @@ static int __init davinci_gpio_setup(void) if (chips[i].chip.ngpio > 32) chips[i].chip.ngpio = 32; + spin_lock_init(&chips[i].lock); + regs = gpio2regs(base); chips[i].regs = regs; chips[i].set_data = ®s->set_data; diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h index 9a71a26..504cc18 100644 --- a/arch/arm/mach-davinci/include/mach/gpio.h +++ b/arch/arm/mach-davinci/include/mach/gpio.h @@ -14,6 +14,8 @@ #define __DAVINCI_GPIO_H #include +#include + #include #include @@ -52,6 +54,7 @@ enum davinci_gpio_type { struct davinci_gpio_controller { struct gpio_chip chip; int irq_base; + spinlock_t lock; void __iomem *regs; void __iomem *set_data; void __iomem *clr_data;