From patchwork Fri May 7 21:06:32 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cyril Chemparathy X-Patchwork-Id: 97842 Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o47LrK3f009464 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Fri, 7 May 2010 21:53:56 GMT Received: from dlep35.itg.ti.com ([157.170.170.118]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id o47L6qGT004845 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 7 May 2010 16:06:52 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep35.itg.ti.com (8.13.7/8.13.7) with ESMTP id o47L6p7R024213; Fri, 7 May 2010 16:06:52 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 8CD6280628; Fri, 7 May 2010 16:06:51 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dlep33.itg.ti.com (dlep33.itg.ti.com [157.170.170.112]) by linux.omap.com (Postfix) with ESMTP id 77CA680627 for ; Fri, 7 May 2010 16:06:50 -0500 (CDT) Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id o47L6mmI029522; Fri, 7 May 2010 16:06:48 -0500 (CDT) Received: from gtrgwdeb (gtrgwdeb.telogy.design.ti.com [158.218.102.24]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id o47L6lP08047; Fri, 7 May 2010 16:06:47 -0500 (CDT) Received: by gtrgwdeb (Postfix, from userid 39959) id 2BC4E1E451A; Fri, 7 May 2010 17:06:46 -0400 (EDT) From: Cyril Chemparathy To: davinci-linux-open-source@linux.davincidsp.com Subject: [PATCH v3 1/8] Davinci: gpio - use ioremap() Date: Fri, 7 May 2010 17:06:32 -0400 Message-Id: <1273266399-17164-2-git-send-email-cyril@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1273266399-17164-1-git-send-email-cyril@ti.com> References: <1273266399-17164-1-git-send-email-cyril@ti.com> Cc: sshtylyov@mvista.com X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Greylist: Sender succeeded STARTTLS authentication, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Fri, 07 May 2010 21:53:57 +0000 (UTC) diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 83879f8..4f5727f 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -1201,7 +1201,7 @@ static struct davinci_soc_info davinci_soc_info_da830 = { .intc_irq_num = DA830_N_CP_INTC_IRQ, .timer_info = &da830_timer_info, .gpio_type = GPIO_TYPE_DAVINCI, - .gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE), + .gpio_base = DA8XX_GPIO_BASE, .gpio_num = 128, .gpio_irq = IRQ_DA8XX_GPIO0, .serial_dev = &da8xx_serial_device, diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 2b6dd59..cb7f663 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -1086,7 +1086,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = { .intc_irq_num = DA850_N_CP_INTC_IRQ, .timer_info = &da850_timer_info, .gpio_type = GPIO_TYPE_DAVINCI, - .gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE), + .gpio_base = DA8XX_GPIO_BASE, .gpio_num = 144, .gpio_irq = IRQ_DA8XX_GPIO0, .serial_dev = &da8xx_serial_device, diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 0c62a68..277041d 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -855,7 +855,7 @@ static struct davinci_soc_info davinci_soc_info_dm355 = { .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm355_timer_info, .gpio_type = GPIO_TYPE_DAVINCI, - .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), + .gpio_base = DAVINCI_GPIO_BASE, .gpio_num = 104, .gpio_irq = IRQ_DM355_GPIOBNK0, .serial_dev = &dm355_serial_device, diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index ed76450..ecdbc67 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1060,7 +1060,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = { .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm365_timer_info, .gpio_type = GPIO_TYPE_DAVINCI, - .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), + .gpio_base = DAVINCI_GPIO_BASE, .gpio_num = 104, .gpio_irq = IRQ_DM365_GPIO0, .gpio_unbanked = 8, /* really 16 ... skip muxed GPIOs */ diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 7f36c22..beb315c 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -746,7 +746,7 @@ static struct davinci_soc_info davinci_soc_info_dm644x = { .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm644x_timer_info, .gpio_type = GPIO_TYPE_DAVINCI, - .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), + .gpio_base = DAVINCI_GPIO_BASE, .gpio_num = 71, .gpio_irq = IRQ_GPIOBNK0, .serial_dev = &dm644x_serial_device, diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 8dd0afe..95fc981 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -830,7 +830,7 @@ static struct davinci_soc_info davinci_soc_info_dm646x = { .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm646x_timer_info, .gpio_type = GPIO_TYPE_DAVINCI, - .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), + .gpio_base = DAVINCI_GPIO_BASE, .gpio_num = 43, /* Only 33 usable */ .gpio_irq = IRQ_DM646X_GPIOBNK0, .serial_dev = &dm646x_serial_device, diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index 2efb446..bf0ff58 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c @@ -37,22 +37,22 @@ struct davinci_gpio_regs { container_of(chip, struct davinci_gpio_controller, chip) static struct davinci_gpio_controller chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)]; +static void __iomem *gpio_base; static struct davinci_gpio_regs __iomem __init *gpio2regs(unsigned gpio) { void __iomem *ptr; - void __iomem *base = davinci_soc_info.gpio_base; if (gpio < 32 * 1) - ptr = base + 0x10; + ptr = gpio_base + 0x10; else if (gpio < 32 * 2) - ptr = base + 0x38; + ptr = gpio_base + 0x38; else if (gpio < 32 * 3) - ptr = base + 0x60; + ptr = gpio_base + 0x60; else if (gpio < 32 * 4) - ptr = base + 0x88; + ptr = gpio_base + 0x88; else if (gpio < 32 * 5) - ptr = base + 0xb0; + ptr = gpio_base + 0xb0; else ptr = NULL; return ptr; @@ -157,6 +157,10 @@ static int __init davinci_gpio_setup(void) if (WARN_ON(DAVINCI_N_GPIO < ngpio)) ngpio = DAVINCI_N_GPIO; + gpio_base = ioremap(soc_info->gpio_base, SZ_4K); + if (WARN_ON(!gpio_base)) + return -ENOMEM; + for (i = 0, base = 0; base < ngpio; i++, base += 32) { chips[i].chip.label = "DaVinci"; @@ -445,7 +449,7 @@ done: /* BINTEN -- per-bank interrupt enable. genirq would also let these * bits be set/cleared dynamically. */ - __raw_writel(binten, soc_info->gpio_base + 0x08); + __raw_writel(binten, gpio_base + 0x08); printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0)); diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index a58bd88..2dd2226 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -60,7 +60,7 @@ struct davinci_soc_info { unsigned long intc_irq_num; struct davinci_timer_info *timer_info; int gpio_type; - void __iomem *gpio_base; + u32 gpio_base; unsigned gpio_num; unsigned gpio_irq; unsigned gpio_unbanked;