diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index f89b0b7..e907ef5 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -43,6 +43,7 @@
 
 #define DA850_MMCSD_CD_PIN		GPIO_TO_PIN(4, 0)
 #define DA850_MMCSD_WP_PIN		GPIO_TO_PIN(4, 1)
+#define DA850_PRU_CAN_TRX_PIN  GPIO_TO_PIN(2, 0)
 
 #define DA850_MII_MDIO_CLKEN_PIN	GPIO_TO_PIN(2, 6)
 
@@ -188,6 +189,32 @@ static struct platform_device *da850_evm_devices[] __initdata = {
 	&da850_evm_norflash_device,
 };
 
+static int __init da850_evm_setup_pru_can(void)
+{
+	int ret;
+
+	if (!machine_is_davinci_da850_evm())
+		return 0;
+
+	ret = davinci_cfg_reg_list(da850_pru_can_pins);
+	if (ret)
+		pr_warning("da850_evm_init: da850_pru_can_pins mux setup"
+					"failed:%d\n", ret);
+
+	ret = gpio_request(DA850_PRU_CAN_TRX_PIN, "pru_can_en");
+	if (ret)
+		pr_warning("Cannot open GPIO %d\n", DA850_PRU_CAN_TRX_PIN);
+
+	/* value = 0 to enable the can transceiver */
+	gpio_direction_output(DA850_PRU_CAN_TRX_PIN, 0);
+	ret = da8xx_register_pru_can();
+	if (ret)
+		pr_warning("da850_evm_init: pru can registration failed:"
+				"%d\n", ret);
+	return ret;
+}
+device_initcall(da850_evm_setup_pru_can);
+
 #define DA8XX_AEMIF_CE2CFG_OFFSET	0x10
 #define DA8XX_AEMIF_ASIZE_16BIT		0x1
 
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 63916b9..59a3638 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -238,6 +238,13 @@ static struct clk tptc2_clk = {
 	.flags		= ALWAYS_ENABLED,
 };
 
+static struct clk pru_clk = {
+	.name       = "pru_ck",
+	.parent     = &pll0_sysclk2,
+	.lpsc       = DA8XX_LPSC0_DMAX,
+	.flags      = ALWAYS_ENABLED,
+};
+
 static struct clk uart0_clk = {
 	.name		= "uart0",
 	.parent		= &pll0_sysclk2,
@@ -373,6 +380,7 @@ static struct clk_lookup da850_clks[] = {
 	CLK(NULL,		"tpcc1",	&tpcc1_clk),
 	CLK(NULL,		"tptc2",	&tptc2_clk),
 	CLK(NULL,		"uart0",	&uart0_clk),
+	CLK(NULL,       "pru_ck",   &pru_clk),
 	CLK(NULL,		"uart1",	&uart1_clk),
 	CLK(NULL,		"uart2",	&uart2_clk),
 	CLK(NULL,		"aintc",	&aintc_clk),
@@ -390,12 +398,15 @@ static struct clk_lookup da850_clks[] = {
 	CLK(NULL,		NULL,		NULL),
 };
 
-/*
- * Device specific mux setup
- *
- *		soc	description	mux	mode	mode	mux	dbg
- *					reg	offset	mask	mode
+/*  soc         -> DA850
+ *  desc        -> Pin name, which evaluates to soc##_##desc.
+ *  muxreg      -> Pin Multiplexing Control n (PINMUXn) Register number.
+ *  mode_offset -> Bit offset in the register PINMUXn.
+ *  mode_mask   -> Number of bits for Pin Multiplexing Control n.
+ *  mux_mode    -> Multiplexing mode to set.
+ *  dbg         -> debug on/off.
  */
+
 static const struct mux_config da850_pins[] = {
 #ifdef CONFIG_DAVINCI_MUX
 	/* UART0 function */
@@ -514,7 +525,7 @@ static const struct mux_config da850_pins[] = {
 	MUX_CFG(DA850, EMA_A_5,		12,	8,	15,	1,	false)
 	MUX_CFG(DA850, EMA_A_6,		12,	4,	15,	1,	false)
 	MUX_CFG(DA850, EMA_A_7,		12,	0,	15,	1,	false)
-	MUX_CFG(DA850, EMA_A_8,		11,	28,	15,	1,	false)
+	MUX_CFG(DA850, EMA_A_8,     11, 28, 15, 1,  false)
 	MUX_CFG(DA850, EMA_A_9,		11,	24,	15,	1,	false)
 	MUX_CFG(DA850, EMA_A_10,	11,	20,	15,	1,	false)
 	MUX_CFG(DA850, EMA_A_11,	11,	16,	15,	1,	false)
@@ -542,7 +553,12 @@ static const struct mux_config da850_pins[] = {
 	MUX_CFG(DA850, EMA_CLK,		6,	0,	15,	1,	false)
 	MUX_CFG(DA850, EMA_WAIT_1,	6,	24,	15,	1,	false)
 	MUX_CFG(DA850, NEMA_CS_2,	7,	0,	15,	1,	false)
+    /* PRU functions for soft can */
+	MUX_CFG(DA850, PRU0_R31_0,  7,  28, 15, 0,  false)
+	MUX_CFG(DA850, PRU1_R30_15, 12, 0,  15, 4,  false)
+	MUX_CFG(DA850, PRU1_R31_18, 11, 20,  15, 0,  false)
 	/* GPIO function */
+	MUX_CFG(DA850, GPIO2_0,     6,  28, 15, 8,  false)
 	MUX_CFG(DA850, GPIO2_6,		6,	4,	15,	8,	false)
 	MUX_CFG(DA850, GPIO2_8,		5,	28,	15,	8,	false)
 	MUX_CFG(DA850, GPIO2_15,	5,	0,	15,	8,	false)
@@ -557,6 +573,12 @@ const short da850_uart0_pins[] __initdata = {
 	-1
 };
 
+const short da850_pru_can_pins[] __initdata = {
+	DA850_GPIO2_0, DA850_PRU0_R31_0, DA850_PRU1_R30_15,
+	DA850_PRU1_R31_18,
+	-1
+};
+
 const short da850_uart1_pins[] __initdata = {
 	DA850_UART1_RXD, DA850_UART1_TXD,
 	-1
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 9eec630..11a9b67 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -14,6 +14,7 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/serial_8250.h>
+#include <linux/can/platform/ti_omapl_pru_can.h>
 
 #include <mach/cputype.h>
 #include <mach/common.h>
@@ -85,6 +86,42 @@ struct platform_device da8xx_serial_device = {
 	},
 };
 
+/* Info specific to OMAPL138 */
+#define OMAPL138_PRU_MEM_BASE     0x01C30000
+#define OMAPL138_INT_PRU_CAN IRQ_DA8XX_EVTOUT0
+static struct resource omapl138_pru_can_resources[] = {
+	{
+		.start  = OMAPL138_PRU_MEM_BASE,
+		.end    = OMAPL138_PRU_MEM_BASE + 0xFFFF,
+		.flags  = IORESOURCE_MEM,
+	},
+	{
+		.start  = OMAPL138_INT_PRU_CAN,
+		.end    = OMAPL138_INT_PRU_CAN,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device omapl138_pru_can_device = {
+	.name			= "davinci_pru_can",
+	.id				= 1,
+	.num_resources  = ARRAY_SIZE(omapl138_pru_can_resources),
+	.resource       = omapl138_pru_can_resources,
+};
+
+/* Info specific to CAN conroller */
+#define OMAPL138_PRU_CAN_VERSION           1
+
+static struct ti_pru_can_platform_data ti_pru_can_pdata = {
+	.version	=	OMAPL138_PRU_CAN_VERSION,
+};
+
+int __init da8xx_register_pru_can(void)
+{
+	omapl138_pru_can_device.dev.platform_data = &ti_pru_can_pdata;
+	return platform_device_register(&omapl138_pru_can_device);
+}
+
 static const s8 da8xx_queue_tc_mapping[][2] = {
 	/* {event queue no, TC no} */
 	{0, 0},
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 4247b3f..3e88676 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -74,6 +74,7 @@ int da8xx_register_watchdog(void);
 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
 int da8xx_register_emac(void);
+int da8xx_register_pru_can(void);
 int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
 int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
 int da850_register_mmcsd1(struct davinci_mmc_config *config);
@@ -122,6 +123,7 @@ extern const short da850_uart2_pins[];
 extern const short da850_i2c0_pins[];
 extern const short da850_i2c1_pins[];
 extern const short da850_cpgmac_pins[];
+extern const short da850_pru_can_pins[];
 extern const short da850_mcasp_pins[];
 extern const short da850_lcdcntl_pins[];
 extern const short da850_mmcsd0_pins[];
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index de11aac..1f1fb64 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -906,8 +906,13 @@ enum davinci_da850_index {
 	DA850_EMA_CLK,
 	DA850_EMA_WAIT_1,
 	DA850_NEMA_CS_2,
+    /* PRU I/O */
+	DA850_PRU0_R31_0,
+	DA850_PRU1_R30_15,
+	DA850_PRU1_R31_18,
 
 	/* GPIO function */
+	DA850_GPIO2_0,
 	DA850_GPIO2_6,
 	DA850_GPIO2_8,
 	DA850_GPIO2_15,
diff --git a/include/linux/can/platform/ti_omapl_pru_can.h b/include/linux/can/platform/ti_omapl_pru_can.h
new file mode 100644
index 0000000..0dea436
--- /dev/null
+++ b/include/linux/can/platform/ti_omapl_pru_can.h
@@ -0,0 +1,29 @@
+/*
+ * TI OMAPL PRU CAN Emulation device driver
+ *
+ * This driver supports TI's PRU CAN Emulation and the
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+
+/**
+ * struct ti_pru_can_platform_data - PRU CAN platform data
+ *
+ * @version:            version for future use
+ *
+ * Platform data structure to get all platform specific settings.
+ */
+
+struct ti_pru_can_platform_data {
+	u32 version;
+};
