From patchwork Mon Sep 24 22:20:07 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Murali Karicheri X-Patchwork-Id: 1500481 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by patchwork1.kernel.org (Postfix) with ESMTP id 3E3E03FC71 for ; Mon, 24 Sep 2012 22:22:56 +0000 (UTC) Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id q8OMLmbQ026985; Mon, 24 Sep 2012 17:21:48 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8OMLmbj032748; Mon, 24 Sep 2012 17:21:48 -0500 Received: from dlelxv24.itg.ti.com (172.17.1.199) by dfle73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.1.323.3; Mon, 24 Sep 2012 17:21:48 -0500 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dlelxv24.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8OMLm0h026044; Mon, 24 Sep 2012 17:21:48 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 9C62F80627; Mon, 24 Sep 2012 17:21:48 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dlelxv30.itg.ti.com (dlelxv30.itg.ti.com [172.17.2.17]) by linux.omap.com (Postfix) with ESMTP id DA2DC80626 for ; Mon, 24 Sep 2012 17:20:16 -0500 (CDT) Received: from DLEE74.ent.ti.com (dlee74.ent.ti.com [157.170.170.8]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8OMKGU9029217; Mon, 24 Sep 2012 17:20:16 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE74.ent.ti.com (157.170.170.8) with Microsoft SMTP Server id 14.1.323.3; Mon, 24 Sep 2012 17:20:16 -0500 Received: from ares-ubuntu.am.dhcp.ti.com (ares-ubuntu.am.dhcp.ti.com [158.218.103.17]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8OMKGws021638; Mon, 24 Sep 2012 17:20:16 -0500 Received: from a0868495 by ares-ubuntu.am.dhcp.ti.com with local (Exim 4.76) (envelope-from ) id 1TGH0i-0004xH-Ar; Mon, 24 Sep 2012 18:20:16 -0400 From: Murali Karicheri To: , , , , , , , , , , , , , , Subject: [PATCH v1 06/12] ARM: davinci - restructure header files for common clk migration Date: Mon, 24 Sep 2012 18:20:07 -0400 Message-ID: <1348525213-18987-7-git-send-email-m-karicheri2@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1348525213-18987-1-git-send-email-m-karicheri2@ti.com> References: <1348525213-18987-1-git-send-email-m-karicheri2@ti.com> MIME-Version: 1.0 X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com As part of migrating to common clk framework usage in DaVinci SoCs, clock.h and clock.c are being deprecated as the pll and psc clock drivers are moved to drivers/clk/davinci. The relevant PLL defines are moved to include/mach/pll.h and will be used by SoC specific code instead of using clock.h. The psc.c code is being deprecated as the psc specific code is moved to the drivers/clk/davinci. So the extern definitions are not used anymore and is now conditionally included. Signed-off-by: Murali Karicheri diff --git a/arch/arm/mach-davinci/include/mach/pll.h b/arch/arm/mach-davinci/include/mach/pll.h new file mode 100644 index 0000000..d21e5b9 --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/pll.h @@ -0,0 +1,82 @@ +/* + * TI DaVinci PLL definitions + * + * Copyright (C) 2006-2012 Texas Instruments. + * Copyright (C) 2008-2009 Deep Root Systems, LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __ASM_ARCH_PLL_H +#define __ASM_ARCH_PLL_H + +#define DAVINCI_PLL1_BASE 0x01c40800 +#define DAVINCI_PLL2_BASE 0x01c40c00 +#define MAX_PLL 2 + +/* PLL/Reset register offsets */ +#define PLLCTL 0x100 +#define PLLCTL_PLLEN BIT(0) +#define PLLCTL_PLLPWRDN BIT(1) +#define PLLCTL_PLLRST BIT(3) +#define PLLCTL_PLLDIS BIT(4) +#define PLLCTL_PLLENSRC BIT(5) +#define PLLCTL_CLKMODE BIT(8) + +#define PLLCTL_CLKMODE_SHIFT 8 +#define PLLCTL_CLKMODE_WIDTH 1 +#define PLLCTL_PLLEN_SHIFT 0 +#define PLLCTL_PLLEN_WIDTH 1 + +#define PLLDIV1 0x118 +#define PLLDIV2 0x11c +#define PLLDIV3 0x120 +#define OSCDIV1 0x124 +#define BPDIV 0x12c +#define PLLCMD 0x138 +#define PLLSTAT 0x13c +#define PLLALNCTL 0x140 +#define PLLDCHANGE 0x144 +#define PLLCKEN 0x148 +#define PLLCKSTAT 0x14c +#define PLLSYSTAT 0x150 +#define PLLDIV4 0x160 +#define PLLDIV5 0x164 +#define PLLDIV6 0x168 +#define PLLDIV7 0x16c +#define PLLDIV8 0x170 +#define PLLDIV9 0x174 +#define PLLDIV10 0x178 +#define PLLDIV11 0x17c +#define PLLDIV12 0x180 +#define PLLDIV13 0x184 +#define PLLDIV14 0x188 +#define PLLDIV15 0x18c +#define PLLDIV16 0x190 +#define PLLDIV_RATIO_MASK 0x1f +#define PLLDIV_EN BIT(15) + +/* + * OMAP-L138 system reference guide recommends a wait for 4 OSCIN/CLKIN + * cycles to ensure that the PLLC has switched to bypass mode. Delay of 1us + * ensures we are good for all > 4MHz OSCIN/CLKIN inputs. Typically the input + * is ~25MHz. Units are micro seconds. + */ +#define PLL_BYPASS_TIME 1 +/* From OMAP-L138 datasheet table 6-4. Units are micro seconds */ +#define PLL_RESET_TIME 1 +/* + * From OMAP-L138 datasheet table 6-4; assuming prediv = 1, sqrt(pllm) = 4 + * Units are micro seconds. + */ +#define PLL_LOCK_TIME 20 +#define PLLSTAT_GOSTAT BIT(0) +#define PLLCMD_GOSET BIT(0) + +#endif /* __ASM_ARCH_PLL_H */ diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 405318e..6abb94c 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -251,9 +251,11 @@ #ifndef __ASSEMBLER__ +#ifndef CONFIG_COMMON_CLK extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, unsigned int id, bool enable, u32 flags); +#endif #endif diff --git a/arch/arm/mach-davinci/include/mach/time.h b/arch/arm/mach-davinci/include/mach/time.h index 1c971d8..7faa530 100644 --- a/arch/arm/mach-davinci/include/mach/time.h +++ b/arch/arm/mach-davinci/include/mach/time.h @@ -31,5 +31,7 @@ enum { #define ID_TO_TIMER(id) (IS_TIMER1(id) != 0) extern struct davinci_timer_instance davinci_timer_instance[]; - +#ifdef CONFIG_COMMON_CLK +extern void davinci_watchdog_reset(struct platform_device *); +#endif #endif /* __ARCH_ARM_MACH_DAVINCI_TIME_H */