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[24.166.64.7]) by mx.google.com with ESMTPS id ww6sm16414630igb.2.2013.02.04.11.46.25 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 04 Feb 2013 11:46:26 -0800 (PST) From: Matt Porter To: Vinod Koul Subject: [PATCH v3 2/3] dma: edma: add device_slave_sg_caps() support Date: Mon, 4 Feb 2013 14:47:03 -0500 Message-ID: <1360007224-21735-3-git-send-email-mporter@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1360007224-21735-1-git-send-email-mporter@ti.com> References: <1360007224-21735-1-git-send-email-mporter@ti.com> CC: Linux DaVinci Kernel List , Linux MMC List , Linux Kernel Mailing List , Grant Likely , Dan Williams , Chris Ball X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com Implement device_slave_sg_caps(). EDMA has a finite set of PaRAM slots available for linking a multi-segment SG transfer. In order to prevent any one channel from consuming all PaRAM slots to fulfill a large SG transfer, the driver reports a static per-channel max number of SG segments it will handle. The maximum size of an SG segment is limited by the addr_width and maxburst of a given transfer request. These values are provided by the client driver and used to calculate and return the maximum segment length. Signed-off-by: Matt Porter --- drivers/dma/edma.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c index f424298..b779cee 100644 --- a/drivers/dma/edma.c +++ b/drivers/dma/edma.c @@ -72,6 +72,7 @@ struct edma_chan { dma_addr_t addr; int addr_width; int maxburst; + struct dma_slave_sg_caps sg_caps; }; struct edma_cc { @@ -463,6 +464,20 @@ static void edma_issue_pending(struct dma_chan *chan) spin_unlock_irqrestore(&echan->vchan.lock, flags); } +static struct dma_slave_sg_caps +*edma_get_slave_sg_caps(struct dma_chan *chan, + enum dma_slave_buswidth addr_width, + u32 maxburst) +{ + struct edma_chan *echan; + + echan = to_edma_chan(chan); + echan->sg_caps.max_seg_len = + (SZ_64K - 1) * addr_width * maxburst; + + return &echan->sg_caps; +} + static size_t edma_desc_size(struct edma_desc *edesc) { int i; @@ -522,6 +537,7 @@ static void __init edma_chan_init(struct edma_cc *ecc, echan->ch_num = EDMA_CTLR_CHAN(ecc->ctlr, i); echan->ecc = ecc; echan->vchan.desc_free = edma_desc_free; + echan->sg_caps.max_seg_nr = MAX_NR_SG; vchan_init(&echan->vchan, dma); @@ -538,6 +554,7 @@ static void edma_dma_init(struct edma_cc *ecc, struct dma_device *dma, dma->device_alloc_chan_resources = edma_alloc_chan_resources; dma->device_free_chan_resources = edma_free_chan_resources; dma->device_issue_pending = edma_issue_pending; + dma->device_slave_sg_caps = edma_get_slave_sg_caps; dma->device_tx_status = edma_tx_status; dma->device_control = edma_control; dma->dev = dev;