From patchwork Thu Jul 18 16:46:41 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Fernandes X-Patchwork-Id: 2829716 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2ECEB9F967 for ; Thu, 18 Jul 2013 16:47:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 962DE201E5 for ; Thu, 18 Jul 2013 16:47:09 +0000 (UTC) Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 36C1E201D3 for ; Thu, 18 Jul 2013 16:47:08 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r6IGl7Qq021344 for ; Thu, 18 Jul 2013 11:47:07 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r6IGl7C0014281 for ; Thu, 18 Jul 2013 11:47:07 -0500 Received: from dlelxv23.itg.ti.com (172.17.1.198) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Thu, 18 Jul 2013 11:47:06 -0500 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id r6IGl6pT011931 for ; Thu, 18 Jul 2013 11:47:06 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id E0F9D80627 for ; Thu, 18 Jul 2013 11:47:06 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dlelxv90.itg.ti.com (dlelxv90.itg.ti.com [172.17.2.17]) by linux.omap.com (Postfix) with ESMTP id C6DBD80626 for ; Thu, 18 Jul 2013 11:46:51 -0500 (CDT) Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r6IGkpWu013441; Thu, 18 Jul 2013 11:46:51 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Thu, 18 Jul 2013 11:46:51 -0500 Received: from joel-laptop.am.dhcp.ti.com (joel-laptop.am.dhcp.ti.com [10.247.24.76]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r6IGkjSr021186; Thu, 18 Jul 2013 11:46:51 -0500 From: Joel Fernandes To: Tony Lindgren , Sekhar Nori , Matt Porter , Grant Likely , Rob Herring , Vinod Koul , Mark Brown , Benoit Cousson , Russell King , Balaji TK , Gururaja Hebbar , Chris Ball Subject: [PATCH 3/3] dma: edma: add device_slave_sg_limits() support Date: Thu, 18 Jul 2013 11:46:41 -0500 Message-ID: <1374166001-31340-4-git-send-email-joelf@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1374166001-31340-1-git-send-email-joelf@ti.com> References: <1374166001-31340-1-git-send-email-joelf@ti.com> MIME-Version: 1.0 CC: Linux DaVinci Kernel List , Arnd Bergmann , Mark Jackson , Joel Fernandes , Devicetree Discuss , Linux Documentation List , Linux MMC List , Linux Kernel Mailing List , Jason Kridner , Linux SPI Devel List , Linux OMAP List , Linux ARM Kernel List X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: Errors-To: davinci-linux-open-source-bounces+patchwork-davinci=patchwork.kernel.org@linux.davincidsp.com X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Matt Porter Implement device_slave_sg_limits(). EDMA has a finite set of PaRAM slots available for linking a multi-segment SG transfer. In order to prevent any one channel from consuming all PaRAM slots to fulfill a large SG transfer, the driver reports a static per-channel max number of SG segments it will handle. The maximum size of an SG segment is limited by the addr_width and maxburst of a given transfer request. These values are provided by the client driver and used to calculate and return the maximum segment length. [Joel Fernandes : Changes for filling sg_limits by DMAEngine implementation and allocating in client, channel parameter is unused in this implementation as all channels have the same capability] Signed-off-by: Matt Porter Signed-off-by: Joel Fernandes Cc: Mark Jackson --- drivers/dma/edma.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c index 5f3e532..964de26 100644 --- a/drivers/dma/edma.c +++ b/drivers/dma/edma.c @@ -462,6 +462,19 @@ static void edma_issue_pending(struct dma_chan *chan) spin_unlock_irqrestore(&echan->vchan.lock, flags); } +static inline int edma_get_slave_sg_limits(struct dma_chan *chan, + enum dma_slave_buswidth addr_width, + u32 maxburst, + struct dma_slave_sg_limits *sg_limits) +{ + if (!sg_limits) + return -EINVAL; + sg_limits->max_seg_nr = MAX_NR_SG; + sg_limits->max_seg_len = + (SZ_64K - 1) * addr_width * maxburst; + return 0; +} + static size_t edma_desc_size(struct edma_desc *edesc) { int i; @@ -537,6 +550,7 @@ static void edma_dma_init(struct edma_cc *ecc, struct dma_device *dma, dma->device_alloc_chan_resources = edma_alloc_chan_resources; dma->device_free_chan_resources = edma_free_chan_resources; dma->device_issue_pending = edma_issue_pending; + dma->device_slave_sg_limits = edma_get_slave_sg_limits; dma->device_tx_status = edma_tx_status; dma->device_control = edma_control; dma->dev = dev;