From patchwork Thu Nov 21 18:15:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lad, Prabhakar" X-Patchwork-Id: 3220201 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B999A9F461 for ; Thu, 21 Nov 2013 18:18:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6DC2E20635 for ; Thu, 21 Nov 2013 18:18:31 +0000 (UTC) Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CE838206DC for ; Thu, 21 Nov 2013 18:18:28 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id rALIHTM0012326; Thu, 21 Nov 2013 12:17:29 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id rALIHQ88028171; Thu, 21 Nov 2013 12:17:28 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.2.342.3; Thu, 21 Nov 2013 12:17:25 -0600 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id rALIHOTn019832; Thu, 21 Nov 2013 12:17:24 -0600 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id A0F368062A; Thu, 21 Nov 2013 12:17:24 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflxv17.itg.ti.com (dflxv17.itg.ti.com [128.247.5.93]) by linux.omap.com (Postfix) with ESMTP id DA41F8062B for ; Thu, 21 Nov 2013 12:16:21 -0600 (CST) Received: from medina.ext.ti.com (medina.ext.ti.com [192.91.81.31]) by dflxv17.itg.ti.com (8.14.3/8.13.8) with ESMTP id rALIGL35014547 for ; Thu, 21 Nov 2013 12:16:21 -0600 Received: from mail6.bemta7.messagelabs.com (mail6.bemta7.messagelabs.com [216.82.255.55]) by medina.ext.ti.com (8.13.7/8.13.7) with ESMTP id rALIGLps027279 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 21 Nov 2013 12:16:21 -0600 Received: from [216.82.253.147:2951] by server-11.bemta-7.messagelabs.com id AB/9B-26956-5FD4E825; Thu, 21 Nov 2013 18:16:21 +0000 X-Env-Sender: prabhakar.csengg@gmail.com X-Msg-Ref: server-3.tower-165.messagelabs.com!1385057779!11829215!1 X-Originating-IP: [209.85.160.52] X-SpamReason: No, hits=0.0 required=7.0 tests=ML_RADAR_SPEW_LINKS_14, spamassassin: X-StarScan-Received: X-StarScan-Version: 6.9.13; banners=-,-,- X-VirusChecked: Checked Received: (qmail 19621 invoked from network); 21 Nov 2013 18:16:20 -0000 Received: from mail-pb0-f52.google.com (HELO mail-pb0-f52.google.com) (209.85.160.52) by server-3.tower-165.messagelabs.com with RC4-SHA encrypted SMTP; 21 Nov 2013 18:16:20 -0000 Received: by mail-pb0-f52.google.com with SMTP id uo5so106330pbc.25 for ; Thu, 21 Nov 2013 10:16:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0B6oXSo4rTGrXekviNbxapq+yC8LK0XQB+lQH2CwHv0=; b=VfpmLHE/cNgSmsDfHAMZ+0TY5+AHI2Lv0grC8gomiMY/jATsEZ36Hz/2RkqidB0LxK FFbL1PZIcAGTcVqQTmAGWexnSRfZLfTVKtneqbSN+auWE5ZG+cVLXbgfc18iw2A+rubT x9tvORLNcHlwFGg/3cImk1Auv6ScbSxdOdr6i/jj+RadrJg3MAmlZRRgdYvX8uUfOeTM YYfQyJnmb+9m3DLjvgplgO+eDthZJkpNT1n2HG8Xy4pYN8QBIGyH7JSVphCWd3VvuIQr z0HmghA0xNUdCUAOZORJEoCgU112ErahqmDqz5EgxbW7mL+lYc0qw6WAOcDmah7lxTXY f35w== X-Received: by 10.67.22.38 with SMTP id hp6mr7719645pad.53.1385057779473; Thu, 21 Nov 2013 10:16:19 -0800 (PST) Received: from localhost.localdomain ([59.161.53.225]) by mx.google.com with ESMTPSA id bl8sm43648678pad.17.2013.11.21.10.16.11 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 21 Nov 2013 10:16:18 -0800 (PST) From: Prabhakar Lad To: Sekhar Nori , Linus Walleij , Grygorii Strashko Subject: [PATCH v6 4/6] gpio: davinci: add OF support Date: Thu, 21 Nov 2013 23:45:29 +0530 Message-ID: <1385057731-4348-5-git-send-email-prabhakar.csengg@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1385057731-4348-1-git-send-email-prabhakar.csengg@gmail.com> References: <1385057731-4348-1-git-send-email-prabhakar.csengg@gmail.com> CC: Mark Rutland , , DLOS , Pawel Moll , , Stephen Warren , LKML , Rob Herring , , Rob Landley , Grant Likely , Ian Campbell , LAK X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: KV Sujith This patch adds OF parser support for davinci gpio driver and also appropriate documentation in gpio-davinci.txt located at Documentation/devicetree/bindings/gpio/. Acked-by: Linus Walleij Acked-by: Rob Herring Signed-off-by: KV Sujith Signed-off-by: Philip Avinash [prabhakar.csengg@gmail.com: simplified the OF code, removed unnecessary DT property and also simplified the commit message] Signed-off-by: Lad, Prabhakar --- .../devicetree/bindings/gpio/gpio-davinci.txt | 41 ++++++++++++++ drivers/gpio/gpio-davinci.c | 57 ++++++++++++++++++-- 2 files changed, 95 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-davinci.txt diff --git a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt new file mode 100644 index 0000000..a2e839d --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt @@ -0,0 +1,41 @@ +Davinci GPIO controller bindings + +Required Properties: +- compatible: should be "ti,dm6441-gpio" + +- reg: Physical base address of the controller and the size of memory mapped + registers. + +- gpio-controller : Marks the device node as a gpio controller. + +- interrupt-parent: phandle of the parent interrupt controller. + +- interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are + supported at a time. + +- ti,ngpio: The number of GPIO pins supported. + +- ti,davinci-gpio-unbanked: The number of GPIOs that have an individual interrupt + line to processor. + +The GPIO controller also acts as an interrupt controller. It uses the default +two cells specifier as described in Documentation/devicetree/bindings/ +interrupt-controller/interrupts.txt. + +Example: + +gpio: gpio@1e26000 { + compatible = "ti,dm6441-gpio"; + gpio-controller; + reg = <0x226000 0x1000>; + interrupt-parent = <&intc>; + interrupts = <42 IRQ_TYPE_EDGE_BOTH 43 IRQ_TYPE_EDGE_BOTH + 44 IRQ_TYPE_EDGE_BOTH 45 IRQ_TYPE_EDGE_BOTH + 46 IRQ_TYPE_EDGE_BOTH 47 IRQ_TYPE_EDGE_BOTH + 48 IRQ_TYPE_EDGE_BOTH 49 IRQ_TYPE_EDGE_BOTH + 50 IRQ_TYPE_EDGE_BOTH>; + ti,ngpio = <144>; + ti,davinci-gpio-unbanked = <0>; + interrupt-controller; + #interrupt-cells = <2>; +}; diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 4d6adbc..5bdd9f8 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -17,6 +17,9 @@ #include #include #include +#include +#include +#include #include #include @@ -134,6 +137,40 @@ davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value) writel((1 << offset), value ? &g->set_data : &g->clr_data); } +static struct davinci_gpio_platform_data * +davinci_gpio_get_pdata(struct platform_device *pdev) +{ + struct device_node *dn = pdev->dev.of_node; + struct davinci_gpio_platform_data *pdata; + int ret; + u32 val; + + if (!IS_ENABLED(CONFIG_OF) || !pdev->dev.of_node) + return pdev->dev.platform_data; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return NULL; + + ret = of_property_read_u32(dn, "ti,ngpio", &val); + if (ret) + goto of_err; + + pdata->ngpio = val; + + ret = of_property_read_u32(dn, "ti,davinci-gpio-unbanked", &val); + if (ret) + goto of_err; + + pdata->gpio_unbanked = val; + + return pdata; + +of_err: + dev_err(&pdev->dev, "Populating pdata from DT failed: err %d\n", ret); + return NULL; +} + static int davinci_gpio_probe(struct platform_device *pdev) { int i, base; @@ -144,12 +181,14 @@ static int davinci_gpio_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct resource *res; - pdata = dev->platform_data; + pdata = davinci_gpio_get_pdata(pdev); if (!pdata) { dev_err(dev, "No platform data found\n"); return -EINVAL; } + dev->platform_data = pdata; + /* * The gpio banks conceptually expose a segmented bitmap, * and "ngpio" is one more than the largest zero-based @@ -195,6 +234,9 @@ static int davinci_gpio_probe(struct platform_device *pdev) if (chips[i].chip.ngpio > 32) chips[i].chip.ngpio = 32; +#ifdef CONFIG_OF_GPIO + chips[i].chip.of_node = dev->of_node; +#endif spin_lock_init(&chips[i].lock); regs = gpio2regs(base); @@ -506,11 +548,20 @@ done: return 0; } +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id davinci_gpio_ids[] = { + { .compatible = "ti,dm6441-gpio", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, davinci_gpio_ids); +#endif + static struct platform_driver davinci_gpio_driver = { .probe = davinci_gpio_probe, .driver = { - .name = "davinci_gpio", - .owner = THIS_MODULE, + .name = "davinci_gpio", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(davinci_gpio_ids), }, };