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Wed, 11 Dec 2013 09:52:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=c9rK5GoK3NCy9Oq9KoMXrNVMa5bnt4etbS0F/FWv0CE=; b=RPpI+4N3WhgXpxBdGR31R3AwU872neFKyKFUnT3CRqwCbZ/LGbrG8nibFppoObhTYv r5snnqCGFke1nwuSlHLCbULPWRgMTOa7Pr0mV27c+2xQkXPBz3K+bZZGhn5dnP2/Fb+k hYeOSlc02JJuFlUpqrAoxoew6G4NgHLIWvOtUaCyRiLaRKJUReAiAL40gBYrKg1ISFio lc0lmIw7Nlol3S/xw3V/e9Atp7DdJD9wXabQTtHvreSiYL7Bh5+BDc35JF00Fu0SszQ2 DwV079I0iLyWbqSHmnny3Gy2QjOmox05kKwDsxc3peOvnEzIxUFK6bm3gDxYBBlO5kOo S5Ow== X-Received: by 10.68.218.165 with SMTP id ph5mr3398568pbc.11.1386784342660; Wed, 11 Dec 2013 09:52:22 -0800 (PST) Received: from localhost.localdomain ([117.192.57.235]) by mx.google.com with ESMTPSA id sd3sm34128937pbb.42.2013.12.11.09.52.18 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 11 Dec 2013 09:52:21 -0800 (PST) From: Prabhakar Lad To: Linus Walleij Subject: [PATCH v7] gpio: davinci: use {readl|writel}_relaxed() instead of __raw_* Date: Wed, 11 Dec 2013 23:22:07 +0530 Message-ID: <1386784327-22164-1-git-send-email-prabhakar.csengg@gmail.com> X-Mailer: git-send-email 1.7.9.5 CC: DLOS , Taras Kondratiuk , LKML , X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Lad, Prabhakar" This patch replaces the __raw_readl/writel with {readl|writel}_relaxed(), Altough the code runs on ARMv5 based SOCs, changing this will help copying the code for other uses. Signed-off-by: Lad, Prabhakar Acked-by: Linus Walleij --- This patch is part of series [1] rest of the patches are Acked/reviewed so posting this patch independently and marking it as v7. [1] http://www.spinics.net/lists/devicetree/msg13037.html drivers/gpio/gpio-davinci.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 84be701..805552c 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -82,14 +82,14 @@ static inline int __davinci_direction(struct gpio_chip *chip, u32 mask = 1 << offset; spin_lock_irqsave(&d->lock, flags); - temp = __raw_readl(&g->dir); + temp = readl_relaxed(&g->dir); if (out) { temp &= ~mask; - __raw_writel(mask, value ? &g->set_data : &g->clr_data); + writel_relaxed(mask, value ? &g->set_data : &g->clr_data); } else { temp |= mask; } - __raw_writel(temp, &g->dir); + writel_relaxed(temp, &g->dir); spin_unlock_irqrestore(&d->lock, flags); return 0; @@ -118,7 +118,7 @@ static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset) struct davinci_gpio_controller *d = chip2controller(chip); struct davinci_gpio_regs __iomem *g = d->regs; - return (1 << offset) & __raw_readl(&g->in_data); + return (1 << offset) & readl_relaxed(&g->in_data); } /* @@ -130,7 +130,7 @@ davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value) struct davinci_gpio_controller *d = chip2controller(chip); struct davinci_gpio_regs __iomem *g = d->regs; - __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data); + writel_relaxed((1 << offset), value ? &g->set_data : &g->clr_data); } static int davinci_gpio_probe(struct platform_device *pdev) @@ -227,8 +227,8 @@ static void gpio_irq_disable(struct irq_data *d) struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); u32 mask = (u32) irq_data_get_irq_handler_data(d); - __raw_writel(mask, &g->clr_falling); - __raw_writel(mask, &g->clr_rising); + writel_relaxed(mask, &g->clr_falling); + writel_relaxed(mask, &g->clr_rising); } static void gpio_irq_enable(struct irq_data *d) @@ -242,9 +242,9 @@ static void gpio_irq_enable(struct irq_data *d) status = IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; if (status & IRQ_TYPE_EDGE_FALLING) - __raw_writel(mask, &g->set_falling); + writel_relaxed(mask, &g->set_falling); if (status & IRQ_TYPE_EDGE_RISING) - __raw_writel(mask, &g->set_rising); + writel_relaxed(mask, &g->set_rising); } static int gpio_irq_type(struct irq_data *d, unsigned trigger) @@ -286,10 +286,10 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) int res; /* ack any irqs */ - status = __raw_readl(&g->intstat) & mask; + status = readl_relaxed(&g->intstat) & mask; if (!status) break; - __raw_writel(status, &g->intstat); + writel_relaxed(status, &g->intstat); /* now demux them to the right lowlevel handler */ n = d->irq_base; @@ -346,9 +346,9 @@ static int gpio_irq_type_unbanked(struct irq_data *data, unsigned trigger) if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) return -EINVAL; - __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING) + writel_relaxed(mask, (trigger & IRQ_TYPE_EDGE_FALLING) ? &g->set_falling : &g->clr_falling); - __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING) + writel_relaxed(mask, (trigger & IRQ_TYPE_EDGE_RISING) ? &g->set_rising : &g->clr_rising); return 0; @@ -432,8 +432,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) /* default trigger: both edges */ g = gpio2regs(0); - __raw_writel(~0, &g->set_falling); - __raw_writel(~0, &g->set_rising); + writel_relaxed(~0, &g->set_falling); + writel_relaxed(~0, &g->set_rising); /* set the direct IRQs up to use that irqchip */ for (gpio = 0; gpio < pdata->gpio_unbanked; gpio++, irq++) { @@ -456,8 +456,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) /* disabled by default, enabled only as needed */ g = gpio2regs(gpio); - __raw_writel(~0, &g->clr_falling); - __raw_writel(~0, &g->clr_rising); + writel_relaxed(~0, &g->clr_falling); + writel_relaxed(~0, &g->clr_rising); /* set up all irqs in this bank */ irq_set_chained_handler(bank_irq, gpio_irq_handler); @@ -485,7 +485,7 @@ done: * BINTEN -- per-bank interrupt enable. genirq would also let these * bits be set/cleared dynamically. */ - __raw_writel(binten, gpio_base + BINTEN); + writel_relaxed(binten, gpio_base + BINTEN); printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0));