From patchwork Fri Mar 14 06:42:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Looijmans X-Patchwork-Id: 3831111 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6A751BF540 for ; Fri, 14 Mar 2014 06:44:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7A97120173 for ; Fri, 14 Mar 2014 06:44:01 +0000 (UTC) Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 521D420154 for ; Fri, 14 Mar 2014 06:44:00 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s2E6gtDd031715; Fri, 14 Mar 2014 01:42:55 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2E6grJ4005746; Fri, 14 Mar 2014 01:42:53 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Fri, 14 Mar 2014 01:42:53 -0500 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2E6gqvY018069; Fri, 14 Mar 2014 01:42:52 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 7A41A80627; Fri, 14 Mar 2014 00:42:52 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflxv17.itg.ti.com (dflxv17.itg.ti.com [128.247.5.93]) by linux.omap.com (Postfix) with ESMTP id 5A07F80626 for ; Fri, 14 Mar 2014 00:42:50 -0600 (CST) Received: from medina.ext.ti.com (medina.ext.ti.com [192.91.81.31]) by dflxv17.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2E6goPt024720 for ; Fri, 14 Mar 2014 01:42:50 -0500 Received: from mail6.bemta7.messagelabs.com (mail6.bemta7.messagelabs.com [216.82.255.55]) by medina.ext.ti.com (8.13.7/8.13.7) with ESMTP id s2E6gnoN022247 for ; Fri, 14 Mar 2014 01:42:50 -0500 Received: from [216.82.253.67:16894] by server-17.bemta-7.messagelabs.com id 6F/9A-29184-9E4A2235; Fri, 14 Mar 2014 06:42:49 +0000 X-Env-Sender: mike.looijmans@topic.nl X-Msg-Ref: server-14.tower-158.messagelabs.com!1394779368!7893937!1 X-Originating-IP: [209.17.115.50] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: QmFkIElQOiAyMDkuMTcuMTE1LjUwID0+IDEyOTI4\n,sa_preprocessor: QmFkIElQOiAyMDkuMTcuMTE1LjUwID0+IDEyOTI4\n X-StarScan-Received: X-StarScan-Version: 6.9.16; banners=-,-,- X-VirusChecked: Checked Received: (qmail 5478 invoked from network); 14 Mar 2014 06:42:48 -0000 Received: from atl4mhob12.myregisteredsite.com (HELO atl4mhob12.myregisteredsite.com) (209.17.115.50) by server-14.tower-158.messagelabs.com with SMTP; 14 Mar 2014 06:42:48 -0000 Received: from mailpod.hostingplatform.com ([10.30.71.211]) by atl4mhob12.myregisteredsite.com (8.14.4/8.14.4) with ESMTP id s2E6glVc010152 for ; Fri, 14 Mar 2014 02:42:47 -0400 Received: (qmail 1855 invoked by uid 0); 14 Mar 2014 06:42:47 -0000 X-TCPREMOTEIP: 88.159.208.100 X-Authenticated-UID: mike@milosoftware.com Received: from unknown (HELO paradigit.TOPIC.LOCAL) (mike@milosoftware.com@88.159.208.100) by 0 with ESMTPA; 14 Mar 2014 06:42:47 -0000 From: Mike Looijmans To: , Subject: [PATCH] i2c-davinci: Handle signals gracefully Date: Fri, 14 Mar 2014 07:42:28 +0100 Message-ID: <1394779348-4084-1-git-send-email-mike.looijmans@topic.nl> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1389265885-26777-1-git-send-email-mike.looijmans@topic.nl> References: <1389265885-26777-1-git-send-email-mike.looijmans@topic.nl> CC: Mike Looijmans , , X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When a signal is caught while the i2c-davinci bus driver is transferring, the drive just "abandons" the transfer and leaves the controller to fend for itself. The next I2C transaction will find the controller in an undefined state and often results in a stream of "initiating i2c bus recovery" messages until the controller arrives in a defined state. This behaviour also sends out "half" or possibly even mixed messages to I2C client devices which may put them in an undesired state as well. This patch fixes this issue by always attempting to finish the current transaction, and only abort on bus errors. This keeps the controller in a defined state, and is also much friendlier towards client devices, because it will only send complete messages. Before this patch, reading an I2C device in a loop and interrupting it often resulted in a "initiating i2c bus recovery" storm and not being able to communicate via I2C for several seconds. With this patch, I2C transactions will not be interrupted or otherwise halfway completed. v2: Completely ignore signals. Signed-off-by: Mike Looijmans --- drivers/i2c/busses/i2c-davinci.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index af0b583..254d897 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -372,9 +372,9 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) flag |= DAVINCI_I2C_MDR_STP; davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); - r = wait_for_completion_interruptible_timeout(&dev->cmd_complete, + r = wait_for_completion_timeout(&dev->cmd_complete, dev->adapter.timeout); - if (r == 0) { + if (unlikely(r == 0)) { dev_err(dev->dev, "controller timed out\n"); davinci_i2c_recover_bus(dev); i2c_davinci_init(dev); @@ -384,7 +384,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) if (dev->buf_len) { /* This should be 0 if all bytes were transferred * or dev->cmd_err denotes an error. - * A signal may have aborted the transfer. */ if (r >= 0) { dev_err(dev->dev, "abnormal termination buf_len=%i\n", @@ -436,22 +435,24 @@ i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) ret = i2c_davinci_wait_bus_not_busy(dev, 1); if (ret < 0) { dev_warn(dev->dev, "timeout waiting for bus ready\n"); - return ret; + goto error; } for (i = 0; i < num; i++) { ret = i2c_davinci_xfer_msg(adap, &msgs[i], (i == (num - 1))); - dev_dbg(dev->dev, "%s [%d/%d] ret: %d\n", __func__, i + 1, num, - ret); + dev_dbg(dev->dev, "%s [%d/%d] %#x ret: %d\n", __func__, i + 1, + num, msgs[i].addr, ret); if (ret < 0) - return ret; + goto error; } + ret = num; +error: #ifdef CONFIG_CPU_FREQ complete(&dev->xfr_complete); #endif - return num; + return ret; } static u32 i2c_davinci_func(struct i2c_adapter *adap)