From patchwork Tue Apr 1 13:06:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 3922901 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C3A759F2F7 for ; Tue, 1 Apr 2014 13:13:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0609020221 for ; Tue, 1 Apr 2014 13:13:54 +0000 (UTC) Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0DA0D2021A for ; Tue, 1 Apr 2014 13:13:52 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s31DCtib001244; Tue, 1 Apr 2014 08:12:55 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s31DCsMH017182; Tue, 1 Apr 2014 08:12:54 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Tue, 1 Apr 2014 08:12:54 -0500 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s31DCssA022034; Tue, 1 Apr 2014 08:12:54 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 1277880626; Tue, 1 Apr 2014 07:12:54 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dlelxv90.itg.ti.com (dlelxv90.itg.ti.com [172.17.2.17]) by linux.omap.com (Postfix) with ESMTP id 46D6080627 for ; Tue, 1 Apr 2014 07:06:57 -0600 (CST) Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s31D6vps010364; Tue, 1 Apr 2014 08:06:57 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Tue, 1 Apr 2014 08:06:56 -0500 Received: from dflp33.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s31D6Hfn012538; Tue, 1 Apr 2014 08:06:54 -0500 From: Peter Ujfalusi To: , , Subject: [PATCH v2 13/14] dma: edma: Add channel number to debug prints Date: Tue, 1 Apr 2014 16:06:14 +0300 Message-ID: <1396357575-30585-14-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1396357575-30585-1-git-send-email-peter.ujfalusi@ti.com> References: <1396357575-30585-1-git-send-email-peter.ujfalusi@ti.com> MIME-Version: 1.0 CC: , , , , , , X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It helps to identify issues if we have some information regarding to the channel which the event is associated. Signed-off-by: Peter Ujfalusi --- drivers/dma/edma.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c index 7feb6231276e..2413237840f8 100644 --- a/drivers/dma/edma.c +++ b/drivers/dma/edma.c @@ -185,7 +185,8 @@ static void edma_execute(struct edma_chan *echan) edma_resume(echan->ch_num); if (edesc->processed <= MAX_NR_SG) { - dev_dbg(dev, "first transfer starting %d\n", echan->ch_num); + dev_dbg(dev, "first transfer starting on channel %d\n", + echan->ch_num); edma_start(echan->ch_num); } @@ -195,7 +196,7 @@ static void edma_execute(struct edma_chan *echan) * MAX_NR_SG */ if (echan->missed) { - dev_dbg(dev, "missed event in execute detected\n"); + dev_dbg(dev, "missed event on channel %d\n", echan->ch_num); edma_clean_channel(echan->ch_num); edma_stop(echan->ch_num); edma_start(echan->ch_num); @@ -736,7 +737,7 @@ static int edma_alloc_chan_resources(struct dma_chan *chan) echan->alloced = true; echan->slot[0] = echan->ch_num; - dev_dbg(dev, "allocated channel for %u:%u\n", + dev_dbg(dev, "allocated channel %d for %u:%u\n", echan->ch_num, EDMA_CTLR(echan->ch_num), EDMA_CHAN_SLOT(echan->ch_num)); return 0;