From patchwork Tue Apr 1 13:06:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 3922401 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 49D16BF540 for ; Tue, 1 Apr 2014 13:07:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 89FE6203B4 for ; Tue, 1 Apr 2014 13:07:47 +0000 (UTC) Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5C1E320221 for ; Tue, 1 Apr 2014 13:07:46 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s31D7j7d010262 for ; Tue, 1 Apr 2014 08:07:45 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s31D7jue011506 for ; Tue, 1 Apr 2014 08:07:45 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Tue, 1 Apr 2014 08:07:45 -0500 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s31D7jsX014943 for ; Tue, 1 Apr 2014 08:07:45 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 697C38062B for ; Tue, 1 Apr 2014 07:07:45 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflxv15.itg.ti.com (dflxv15.itg.ti.com [128.247.5.124]) by linux.omap.com (Postfix) with ESMTP id 20DE980627 for ; Tue, 1 Apr 2014 07:06:26 -0600 (CST) Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s31D6QsD018648; Tue, 1 Apr 2014 08:06:26 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Tue, 1 Apr 2014 08:06:25 -0500 Received: from dflp33.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s31D6Hfc012538; Tue, 1 Apr 2014 08:06:23 -0500 From: Peter Ujfalusi To: , , Subject: [PATCH v2 02/14] dma: edma: Correct the handling of src/dst_maxburst == 0 Date: Tue, 1 Apr 2014 16:06:03 +0300 Message-ID: <1396357575-30585-3-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1396357575-30585-1-git-send-email-peter.ujfalusi@ti.com> References: <1396357575-30585-1-git-send-email-peter.ujfalusi@ti.com> MIME-Version: 1.0 CC: , , , , , , X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: Errors-To: davinci-linux-open-source-bounces+patchwork-davinci=patchwork.kernel.org@linux.davincidsp.com X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When clients asks for maxburst = 0 it is basically the same case as if they were asking for maxburst = 1 since in both case ASYNC need to be used and the eDMA is expected to write/read one word per DMA request. Signed-off-by: Peter Ujfalusi --- drivers/dma/edma.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c index cd04eb7b182e..2742867fd1e6 100644 --- a/drivers/dma/edma.c +++ b/drivers/dma/edma.c @@ -285,6 +285,10 @@ static int edma_config_pset(struct dma_chan *chan, struct edmacc_param *pset, int absync; acnt = dev_width; + + /* src/dst_maxburst == 0 is the same case as src/dst_maxburst == 1 */ + if (!burst) + burst = 1; /* * If the maxburst is equal to the fifo width, use * A-synced transfers. This allows for large contiguous