From patchwork Wed Jul 16 12:29:21 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 4566821 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 42B01C0514 for ; Wed, 16 Jul 2014 12:30:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7859C201BA for ; Wed, 16 Jul 2014 12:30:38 +0000 (UTC) Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9C69D2018E for ; Wed, 16 Jul 2014 12:30:37 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s6GCUaHB010149 for ; Wed, 16 Jul 2014 07:30:36 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s6GCUavV019487 for ; Wed, 16 Jul 2014 07:30:36 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Wed, 16 Jul 2014 07:30:36 -0500 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s6GCUaok026866 for ; Wed, 16 Jul 2014 07:30:36 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 10AB180627 for ; Wed, 16 Jul 2014 07:30:36 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflxv15.itg.ti.com (dflxv15.itg.ti.com [128.247.5.124]) by linux.omap.com (Postfix) with ESMTP id 7921080627 for ; Wed, 16 Jul 2014 07:29:31 -0500 (CDT) Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s6GCTTCZ016945; Wed, 16 Jul 2014 07:29:31 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Wed, 16 Jul 2014 07:29:30 -0500 Received: from szilva.Elisa (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s6GCTMYI024914; Wed, 16 Jul 2014 07:29:28 -0500 From: Peter Ujfalusi To: , , Subject: [PATCH 2/2] dma: edma: Support to suppress the period interrupts in cyclic mode Date: Wed, 16 Jul 2014 15:29:21 +0300 Message-ID: <1405513761-23739-3-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1405513761-23739-1-git-send-email-peter.ujfalusi@ti.com> References: <1405513761-23739-1-git-send-email-peter.ujfalusi@ti.com> MIME-Version: 1.0 CC: , , , , X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: Errors-To: davinci-linux-open-source-bounces+patchwork-davinci=patchwork.kernel.org@linux.davincidsp.com X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP If the client (audio) does not request interrupts for every period we can disable them. With updated audio driver stack we can play audio w/o the need to process any edma interrupts. Signed-off-by: Peter Ujfalusi --- drivers/dma/edma.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c index d5017abcf7cb..69f1f5250120 100644 --- a/drivers/dma/edma.c +++ b/drivers/dma/edma.c @@ -723,10 +723,10 @@ static struct dma_async_tx_descriptor *edma_prep_dma_cyclic( edesc->absync = ret; /* - * Enable interrupts for every period because callback - * has to be called for every period. + * Enable period interrupt only if it is requested */ - edesc->pset[i].param.opt |= TCINTEN; + if (tx_flags & DMA_PREP_INTERRUPT) + edesc->pset[i].param.opt |= TCINTEN; } /* Place the cyclic channel to highest priority queue */