From patchwork Wed Apr 6 17:17:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 690201 Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p36HJK0i010948 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 6 Apr 2011 17:19:43 GMT Received: from dlep34.itg.ti.com ([157.170.170.115]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id p36HJKsA019370 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 6 Apr 2011 12:19:20 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep34.itg.ti.com (8.13.7/8.13.7) with ESMTP id p36HJISK021603 for ; Wed, 6 Apr 2011 12:19:19 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id B52B880672 for ; Wed, 6 Apr 2011 12:19:14 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp51.itg.ti.com (dflp51.itg.ti.com [128.247.22.94]) by linux.omap.com (Postfix) with ESMTP id 6677A80626 for ; Wed, 6 Apr 2011 12:19:09 -0500 (CDT) Received: from white.ext.ti.com (localhost [127.0.0.1]) by dflp51.itg.ti.com (8.13.7/8.13.7) with ESMTP id p36HJ8eE009970 for ; Wed, 6 Apr 2011 12:19:09 -0500 (CDT) Received: from psmtp.com (na3sys009amx161.postini.com [74.125.149.87]) by white.ext.ti.com (8.13.7/8.13.7) with SMTP id p36HJ7T0029514 for ; Wed, 6 Apr 2011 12:19:08 -0500 Received: from mail.dev.rtsoft.ru ([213.79.90.226]) by na3sys009amx161.postini.com ([74.125.148.10]) with SMTP; Wed, 06 Apr 2011 10:19:08 PDT Received: (qmail 25541 invoked from network); 6 Apr 2011 17:19:06 -0000 Received: from unknown (HELO wasted.dev.rtsoft.ru) (192.168.1.70) by 0 with SMTP; 6 Apr 2011 17:19:06 -0000 To: khilman@ti.com, davinci-linux-open-source@linux.davincidsp.com, nsekhar@ti.com Subject: [PATCH] DA830: fix SPI1 base address Content-Disposition: inline From: Sergei Shtylyov Organization: MontaVista Software Inc. Date: Wed, 6 Apr 2011 21:17:21 +0400 MIME-Version: 1.0 Message-Id: <201104062117.22238.sshtylyov@ru.mvista.com> X-pstn-neptune: 0/0/0.00/0 X-pstn-levels: (S:91.19340/99.90000 CV:99.9000 FC:95.5390 LC:95.5390 R:95.9108 P:95.9108 M:97.0282 C:98.6951 ) X-pstn-settings: 2 (0.5000:0.5000) s cv gt3 gt2 gt1 r p m c X-pstn-addresses: from [db-null] Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces+patchwork-davinci=patchwork.kernel.org@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces+patchwork-davinci=patchwork.kernel.org@linux.davincidsp.com X-Greylist: Sender succeeded STARTTLS authentication, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 06 Apr 2011 17:19:43 +0000 (UTC) Commit 54ce6883d29630ff334bee4256a25e3f8719a181 (davinci: da8xx: add spi resources and registration routine) wrongly assumed that SPI1 is mapped at the same address on DA830/OMAP-L137 and DA850/OMAP-L138; actually, the base address was valid only for the latter SoC. Teach the code to pass the correct SPI1 memory resource for both SoCs... Signed-off-by: Sergei Shtylyov --- The patch is against the recent DaVinci tree. It's needed in 2.6.39. arch/arm/mach-davinci/devices-da8xx.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) Index: linux-davinci/arch/arm/mach-davinci/devices-da8xx.c =================================================================== --- linux-davinci.orig/arch/arm/mach-davinci/devices-da8xx.c +++ linux-davinci/arch/arm/mach-davinci/devices-da8xx.c @@ -39,7 +39,8 @@ #define DA8XX_GPIO_BASE 0x01e26000 #define DA8XX_I2C1_BASE 0x01e28000 #define DA8XX_SPI0_BASE 0x01c41000 -#define DA8XX_SPI1_BASE 0x01f0e000 +#define DA830_SPI1_BASE 0x01e12000 +#define DA850_SPI1_BASE 0x01f0e000 #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 @@ -762,8 +763,8 @@ static struct resource da8xx_spi0_resour static struct resource da8xx_spi1_resources[] = { [0] = { - .start = DA8XX_SPI1_BASE, - .end = DA8XX_SPI1_BASE + SZ_4K - 1, + .start = DA830_SPI1_BASE, + .end = DA830_SPI1_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -832,5 +833,10 @@ int __init da8xx_register_spi(int instan da8xx_spi_pdata[instance].num_chipselect = len; + if (instance == 1 && cpu_is_davinci_da850()) { + da8xx_spi1_resources[0].start = DA850_SPI1_BASE; + da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1; + } + return platform_device_register(&da8xx_spi_device[instance]); }