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[83.237.62.70]) by mx.google.com with ESMTPSA id cu8sm13835259lbb.12.2014.01.27.14.49.37 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 27 Jan 2014 14:49:38 -0800 (PST) To: , , , , , , , Subject: [PATCH 2/2] DT: net: davinci_emac: "ti, davinci-no-bd-ram" property is actually optional From: Sergei Shtylyov Organization: Cogent Embedded Date: Tue, 28 Jan 2014 02:49:39 +0300 MIME-Version: 1.0 Message-ID: <201401280249.40451.sergei.shtylyov@cogentembedded.com> CC: , X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The "ti,davinci-no-bd-ram" property for the DaVinci EMAC binding simply can't be required one, as it's boolean (which means it's absent if false). While at it, document the property better... Signed-off-by: Sergei Shtylyov --- Documentation/devicetree/bindings/net/davinci_emac.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: net/Documentation/devicetree/bindings/net/davinci_emac.txt =================================================================== --- net.orig/Documentation/devicetree/bindings/net/davinci_emac.txt +++ net/Documentation/devicetree/bindings/net/davinci_emac.txt @@ -10,7 +10,6 @@ Required properties: - ti,davinci-ctrl-mod-reg-offset: offset to control module register - ti,davinci-ctrl-ram-offset: offset to control module ram - ti,davinci-ctrl-ram-size: size of control module ram -- ti,davinci-no-bd-ram: has the emac controller BD RAM - interrupts: interrupt mapping for the davinci emac interrupts sources: 4 sources: