From patchwork Wed Jul 22 12:39:58 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mani, Arun" X-Patchwork-Id: 36813 Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n6MChuMt014874 for ; Wed, 22 Jul 2009 12:43:56 GMT Received: from dlep33.itg.ti.com ([157.170.170.112]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id n6MCe1wU029979; Wed, 22 Jul 2009 07:40:06 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id n6MCe0Mr011415; Wed, 22 Jul 2009 07:40:00 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 4438480627; Wed, 22 Jul 2009 07:40:00 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dlep20.itg.ti.com (dlep20.itg.ti.com [157.170.170.23]) by linux.omap.com (Postfix) with ESMTP id B348B80626 for ; Wed, 22 Jul 2009 07:39:59 -0500 (CDT) Received: from dlee73.ent.ti.com (localhost [127.0.0.1]) by dlep20.itg.ti.com (8.12.11/8.12.11) with ESMTP id n6MCdxAQ028887; Wed, 22 Jul 2009 07:39:59 -0500 (CDT) Received: from dlee02.ent.ti.com ([157.170.170.17]) by dlee73.ent.ti.com ([157.170.170.88]) with mapi; Wed, 22 Jul 2009 07:39:59 -0500 From: "Mani, Arun" To: "Subrahmanya, Chaithrika" , "alsa-devel@alsa-project.org" Date: Wed, 22 Jul 2009 07:39:58 -0500 Thread-Topic: [PATCH] ASoC: tlv320aic3x: Enable PLL when not bypassed Thread-Index: AcoKyQfgvZs9/6XHS8qF4zkXfBeomgAAGBjQ Message-ID: <7A436F7769CA33409C6B44B358BFFF0C011E89804C@dlee02.ent.ti.com> In-Reply-To: <1248263104-12142-1-git-send-email-chaithrika@ti.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Cc: "davinci-linux-open-source@linux.davincidsp.com" , "broonie@opensource.wolfsonmicro.com" Subject: RE: [PATCH] ASoC: tlv320aic3x: Enable PLL when not bypassed X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.4 Precedence: list List-Id: davinci-linux-open-source.linux.davincidsp.com List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com Hi Chaithrika, Do you know why it worked in dm644x. I don't see any specific path taken for the DM644x. Arun -----Original Message----- From: davinci-linux-open-source-bounces@linux.davincidsp.com [mailto:davinci-linux-open-source-bounces@linux.davincidsp.com] On Behalf Of Subrahmanya, Chaithrika Sent: Wednesday, July 22, 2009 7:45 AM To: alsa-devel@alsa-project.org Cc: davinci-linux-open-source@linux.davincidsp.com; broonie@opensource.wolfsonmicro.com Subject: [PATCH] ASoC: tlv320aic3x: Enable PLL when not bypassed PLL was not being enabled when it was not bypassed. This patch enables the PLL when it is used. Additionally, it disables the PLL when it is bypassed. Without this patch, the audio on TI DM646x EVM and DM355 EVM does not work properly. The bit clocks and the frame sync signals from the codec are not correct and hence the playback/record are faster than usual for most sample rates. The reason for this was that the PLL was not enabled when it was not bypassed. Tested on DM6467 EVM, playback tested on DM355 EVM. Signed-off-by: Chaithrika U S --- Applies to master branch of ALSA GIT tree at http://git.kernel.org/?p=linux/kernel/git/tiwai/sound-2.6.git;a=summary sound/soc/codecs/tlv320aic3x.c | 11 ++++++++++- 1 files changed, 10 insertions(+), 1 deletions(-) diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c index ab099f4..cb0d1bf 100644 --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c @@ -767,6 +767,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, int codec_clk = 0, bypass_pll = 0, fsref, last_clk = 0; u8 data, r, p, pll_q, pll_p = 1, pll_r = 1, pll_j = 1; u16 pll_d = 1; + u8 reg; /* select data word length */ data = @@ -801,8 +802,16 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, pll_q &= 0xf; aic3x_write(codec, AIC3X_PLL_PROGA_REG, pll_q << PLLQ_SHIFT); aic3x_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_CLKDIV); - } else + /* disable PLL if it is bypassed */ + reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); + aic3x_write(codec, AIC3X_PLL_PROGA_REG, reg & ~PLL_ENABLE); + + } else { aic3x_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_PLLDIV); + /* enable PLL when it is used */ + reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); + aic3x_write(codec, AIC3X_PLL_PROGA_REG, reg | PLL_ENABLE); + } /* Route Left DAC to left channel input and * right DAC to right channel input */