From 8d867a98edceda63eb2de17e5bfac83f6bef6cae Mon Sep 17 00:00:00 2001
From: Victor Rodriguez <victor.rodriguez@sasken.com>
Date: Mon, 27 Sep 2010 11:01:32 -0500
Subject: [PATCH v1] davinci: EMAC support for Omapl138-Hawkboard
This patch adds EMAC support for the Hawkboard-L138 system
It is under the machine name "omapl138_hawkboard".
This system is based on the da850 davinci CPU architecture.
---
arch/arm/mach-davinci/board-omapl138-hawk.c | 95 +++++++++++++++++++++++++++
1 files changed, 95 insertions(+), 0 deletions(-)
@@ -19,6 +19,101 @@
#include <mach/cp_intc.h>
#include <mach/da8xx.h>
+#include <mach/mux.h>
+
+#define DA850_EVM_PHY_ID "0:07"
+#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
+
+
+#ifdef CONFIG_DA850_UI_RMII
+static inline void omapl138_hawk_setup_emac_rmii(int rmii_sel)
+{
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+ soc_info->emac_pdata->rmii_en = 1;
+ gpio_set_value(rmii_sel, 0);
+}
+#else
+static inline void omapl138_hawk_setup_emac_rmii(int rmii_sel) { }
+#endif
+
+
+static const short hawk_mii_pins[] = {
+ DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
+ DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
+ DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
+ DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
+ DA850_MDIO_D,
+ -1
+};
+
+static const short hawk_rmii_pins[] = {
+ DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
+ DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
+ DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
+ DA850_MDIO_D,
+ -1
+};
+
+
+static int __init omapl138_hawk_config_emac(void)
+{
+ void __iomem *cfg_chip3_base;
+ int ret;
+ u32 val;
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+ u8 rmii_en = soc_info->emac_pdata->rmii_en;
+
+ if (!machine_is_omapl138_hawkboard())
+ return 0;
+
+ cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
+
+ val = __raw_readl(cfg_chip3_base);
+
+ if (rmii_en) {
+ val |= BIT(8);
+ ret = davinci_cfg_reg_list(hawk_rmii_pins);
+ pr_info("EMAC: RMII PHY configured, MII PHY will not be"
+ " functional\n");
+ } else {
+ val &= ~BIT(8);
+ ret = davinci_cfg_reg_list(hawk_rmii_pins);
+ pr_info("EMAC: MII PHY configured, RMII PHY will not be"
+ " functional\n");
+ }
+
+ if (ret)
+ pr_warning("hawk_init: cpgmac/rmii mux setup failed: %d\n",
+ ret);
+
+ /* configure the CFGCHIP3 register for RMII or MII */
+ __raw_writel(val, cfg_chip3_base);
+
+ ret = davinci_cfg_reg(DA850_GPIO2_6);
+
+ if (ret)
+ pr_warning("hawk_init:GPIO(2,6) mux setup" "failed\n");
+
+ ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
+ if (ret) {
+ pr_warning("Cannot open GPIO %d\n",
+ DA850_MII_MDIO_CLKEN_PIN);
+ return ret;
+ }
+
+ /* Enable/Disable MII MDIO clock */
+ gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
+
+ soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
+
+ ret = da8xx_register_emac();
+ if (ret)
+ pr_warning("hawk_init: emac registration failed: %d\n",
+ ret);
+ return 0;
+}
+device_initcall(omapl138_hawk_config_emac);
static struct davinci_uart_config omapl138_hawk_uart_config __initdata = {
.enabled_uarts = 0x7,
--
1.6.0.5